Driver gets the hint value from rte_table_attr for async flow. Parse the value and pass the supported value to hardware accordingly.
Signed-off-by: Rongwei Liu <rongw...@nvidia.com> --- drivers/net/mlx5/mlx5_flow_hw.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index b67b33bc22..70b8e130e8 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -3098,10 +3098,20 @@ flow_hw_table_create(struct rte_eth_dev *dev, grp = container_of(ge, struct mlx5_flow_group, entry); tbl->grp = grp; /* Prepare matcher information. */ + matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_ANY; matcher_attr.priority = attr->flow_attr.priority; matcher_attr.optimize_using_rule_idx = true; matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE; matcher_attr.rule.num_log = rte_log2_u32(nb_flows); + /* Parse hints information. */ + if (attr->specialize) { + if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG) + matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE; + else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG) + matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT; + else + DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize); + } /* Build the item template. */ for (i = 0; i < nb_item_templates; i++) { uint32_t ret; -- 2.27.0