> -----Original Message-----
> From: Power, Ciara <ciara.po...@intel.com>
> Sent: Wednesday, March 1, 2023 2:59 PM
> To: Ji, Kai <kai...@intel.com>
> Cc: dev@dpdk.org; Power, Ciara <ciara.po...@intel.com>; Kusztal, ArkadiuszX
> <arkadiuszx.kusz...@intel.com>; sta...@dpdk.org
> Subject: [PATCH] crypto/qat: fix SM3 auth mode
>
> The SM3 auth mode is now set to 0 for QAT, to support plain hash only.
> This should also be added to the capabilities for GEN3 and GEN4.
> SM3 HMAC is not supported.
>
> Fixes: 75fd4bbc94ab ("crypto/qat: support SM3 hash algorithm")
> Cc: arkadiuszx.kusz...@intel.com
> Cc: sta...@dpdk.org
>
> Signed-off-by: Ciara Power <ciara.po...@intel.com>
> ---
> drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 3 +++
> drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 3 +++
> drivers/crypto/qat/qat_sym_session.c | 2 +-
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/qat/qat_sym_session.c
> b/drivers/crypto/qat/qat_sym_session.c
> index 466482d225..6ad6c7ee3a 100644
> --- a/drivers/crypto/qat/qat_sym_session.c
> +++ b/drivers/crypto/qat/qat_sym_session.c
> @@ -697,7 +697,7 @@ qat_sym_session_configure_auth(struct rte_cryptodev
> *dev,
> switch (auth_xform->algo) {
> case RTE_CRYPTO_AUTH_SM3:
> session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SM3;
> - session->auth_mode = ICP_QAT_HW_AUTH_MODE2;
> + session->auth_mode = ICP_QAT_HW_AUTH_MODE0;
> break;
> case RTE_CRYPTO_AUTH_SHA1:
> session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
> --
> 2.25.1
Acked-by: Arek Kusztal <arkadiuszx.kusz...@intel.com>