Hi Akhil, Patch sets ctx_val to 1 for asymmetric due to cn10k A0 hardware errata and structures are redesigned to satisfy hardware alignment requirements.
Thanks Tejasree > -----Original Message----- > From: Akhil Goyal <gak...@marvell.com> > Sent: Monday, February 27, 2023 11:09 PM > To: Tejasree Kondoj <ktejas...@marvell.com> > Cc: Anoob Joseph <ano...@marvell.com>; Gowrishankar Muthukrishnan > <gmuthukri...@marvell.com>; dev@dpdk.org > Subject: RE: [PATCH v2 05/11] crypto/cnxk: set ctx for AE > > > Subject: [PATCH v2 05/11] crypto/cnxk: set ctx for AE > > > > Set ctx_val to 1 for asymmetric ops. > > > > Please justify patch with proper description. > > > Signed-off-by: Tejasree Kondoj <ktejas...@marvell.com>
