Hi,
> -----Original Message-----
> From: Gregory Etelson <getel...@nvidia.com>
> Sent: Thursday, November 10, 2022 3:05 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getel...@nvidia.com>; Matan Azrad
> <ma...@nvidia.com>; Raslan Darawsheh <rasl...@nvidia.com>;
> sta...@dpdk.org; Slava Ovsiienko <viachesl...@nvidia.com>
> Subject: [PATCH] common/mlx5: fix DevX register read error severity
>
> PMD attempt to read HW UTC counter properties can fail because the
> feature
> has no support in port FW or mlx5 kernel module.
>
> In that case PMD still can produce correct time-stamps if it runs on core with
> nanosecond time resolution.
>
> Fixes: b0067860959d ("common/mlx5: update log for DevX general command
> failure")
> removed extra blank line
> Cc: sta...@dpdk.org
>
added reported-by tag
> Signed-off-by: Gregory Etelson <getel...@nvidia.com>
> Acked-by: Matan Azrad <ma...@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
