On Mon, Nov 02, 2015 at 10:47:53AM +0000, Hunt, David wrote: > On 02/11/2015 06:32, Jerin Jacob wrote: > >On Fri, Oct 30, 2015 at 04:28:25PM +0000, Hunt, David wrote: > > --snip-- > > > > >Hi Jan and Dave, > > > >I have reviewed your patches for arm[64] support. Please check the > >review comments. > > Hi Jerin, > > I'm looking at the comments now, and working on getting the suggested > changes merged into the patch-set. > > >Cavium would like to contribute on armv8 port and remaining libraries > >(ACL, LPM, HASH) implementation for armv8. Currently i am re-basing > >our ACL,HASH libraries implementation based on existing patches. > >Happy to work with you guys to have full fledged armv8 support for DPDK. > > > >Jerin > > Thanks for that, it's good news indeed. > > >other query on rte_cpu_get_flag_enabled for armv8, > >I have tried to run the existing patches on armv8-thunderX platform. > >But there application start failure due to mismatch in > >rte_cpu_get_flag_enabled() encoding. > > > >In my platform rte_cpu_get_flag_enabled() works based on > >AT_HWCAP with following values[1] which different from > >existing lib/librte_eal/common/include/arch/arm/rte_cpuflags.h > > > >[1]http://lxr.free-electrons.com/source/arch/arm64/include/uapi/asm/hwcap.h > > > >In order to debug this, Could provide the following > >values in tested armv8 platform. Look like its running 32bit compatible > >mode in your environment > > I'm using a Gigabyte MP30AR0 motherboard with an 8-core X-Gene, Running a > 4.3.0-rc6 kernel. > Here's the information on the cpu_flags issue you requested: > > >AT_SYSINFO_EHDR: 0x3ff859f0000 > >AT_??? (0x26): 0x430f0a10 > >AT_HWCAP: fb > >AT_PAGESZ: 65536 > >AT_CLKTCK: 100 > >AT_PHDR: 0x400040 > >AT_PHENT: 56 > >AT_PHNUM: 7 > >AT_BASE: 0x3ff85a00000 > >AT_FLAGS: 0x0 > >AT_ENTRY: 0x401900 > >AT_UID: 0 > >AT_EUID: 0 > >AT_GID: 0 > >AT_EGID: 0 > >AT_SECURE: 0 > >AT_RANDOM: 0x3ffef1c7988 > >AT_EXECFN: /bin/sleep > >AT_PLATFORM: aarch64 > > root at mp30ar0:~# LD_SHOW_AUXV=1 sleep 1000 > AT_SYSINFO_EHDR: 0x7f7956d000 > AT_HWCAP: 7 > AT_PAGESZ: 4096 > AT_CLKTCK: 100 > AT_PHDR: 0x400040 > AT_PHENT: 56 > AT_PHNUM: 7 > AT_BASE: 0x7f79543000 > AT_FLAGS: 0x0 > AT_ENTRY: 0x401900 > AT_UID: 0 > AT_EUID: 0 > AT_GID: 0 > AT_EGID: 0 > AT_SECURE: 0 > AT_RANDOM: 0x7ffcaf2e48 > AT_EXECFN: /bin/sleep > AT_PLATFORM: aarch64 >
If am not wrong existing rte_cpu_get_flag_enabled() implementation should be broken in your platform also for arm64. as I could see only AT_HWCAP not AT_HWCAP2 and AT_HWCAP is 0x7 that means your platform also follows http://lxr.free-electrons.com/source/arch/arm64/include/uapi/asm/hwcap.h and the implmentation is FEAT_DEF(SWP, 0x00000001, 0, REG_HWCAP, 0) // not correct for arm64 FEAT_DEF(HALF, 0x00000001, 0, REG_HWCAP, 1) // not correct for arm64 FEAT_DEF(THUMB, 0x00000001, 0, REG_HWCAP, 2) // not correct for arm64 FEAT_DEF(A26BIT, 0x00000001, 0, REG_HWCAP, 3) FEAT_DEF(FAST_MULT, 0x00000001, 0, REG_HWCAP, 4) FEAT_DEF(FPA, 0x00000001, 0, REG_HWCAP, 5) FEAT_DEF(VFP, 0x00000001, 0, REG_HWCAP, 6) FEAT_DEF(EDSP, 0x00000001, 0, REG_HWCAP, 7) FEAT_DEF(JAVA, 0x00000001, 0, REG_HWCAP, 8) FEAT_DEF(IWMMXT, 0x00000001, 0, REG_HWCAP, 9) FEAT_DEF(CRUNCH, 0x00000001, 0, REG_HWCAP, 10) FEAT_DEF(THUMBEE, 0x00000001, 0, REG_HWCAP, 11) FEAT_DEF(NEON, 0x00000001, 0, REG_HWCAP, 12) FEAT_DEF(VFPv3, 0x00000001, 0, REG_HWCAP, 13) FEAT_DEF(VFPv3D16, 0x00000001, 0, REG_HWCAP, 14) FEAT_DEF(TLS, 0x00000001, 0, REG_HWCAP, 15) FEAT_DEF(VFPv4, 0x00000001, 0, REG_HWCAP, 16) FEAT_DEF(IDIVA, 0x00000001, 0, REG_HWCAP, 17) FEAT_DEF(IDIVT, 0x00000001, 0, REG_HWCAP, 18) FEAT_DEF(VFPD32, 0x00000001, 0, REG_HWCAP, 19) FEAT_DEF(LPAE, 0x00000001, 0, REG_HWCAP, 20) FEAT_DEF(EVTSTRM, 0x00000001, 0, REG_HWCAP, 21) FEAT_DEF(AES, 0x00000001, 0, REG_HWCAP2, 0) FEAT_DEF(PMULL, 0x00000001, 0, REG_HWCAP2, 1) FEAT_DEF(SHA1, 0x00000001, 0, REG_HWCAP2, 2) FEAT_DEF(SHA2, 0x00000001, 0, REG_HWCAP2, 3) FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP2, 4) FEAT_DEF(AARCH32, 0x00000001, 0, REG_PLATFORM, 0) FEAT_DEF(AARCH64, 0x00000001, 0, REG_PLATFORM, 1) Am I missing something ? > >root at arm64:/export/dpdk-arm64# zcat /proc/config.gz | grep CONFIG_COMPAT > ># CONFIG_COMPAT_BRK is not set > >CONFIG_COMPAT_BINFMT_ELF=y > >CONFIG_COMPAT=y > >CONFIG_COMPAT_NETLINK_MESSAGES=y > > root at mp30ar0:~# zcat /proc/config.gz | grep CONFIG_COMPAT > # CONFIG_COMPAT_BRK is not set > CONFIG_COMPAT_OLD_SIGACTION=y > CONFIG_COMPAT_BINFMT_ELF=y > CONFIG_COMPAT=y > > > >root at arm64:/export/dpdk-arm64# cat /proc/cpuinfo > >Processor : AArch64 Processor rev 0 (aarch64) > >processor : 0 > >processor : 1 > --snip-- > >processor : 46 > >processor : 47 > >Features : fp asimd aes pmull sha1 sha2 crc32 > >CPU implementer : 0x43 > >CPU architecture: AArch64 > >CPU variant : 0x0 > >CPU part : 0x0a1 > >CPU revision : 0 > > root at mp30ar0:~# cat /proc/cpuinfo > processor : 0 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 1 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 2 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 3 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 4 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 5 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 6 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > processor : 7 > Features : fp asimd evtstrm > CPU implementer : 0x50 > CPU architecture: 8 > CPU variant : 0x0 > CPU part : 0x000 > CPU revision : 1 > > root at mp30ar0:~# > > Hope this helps. > > Regards, > Dave. >
