> @@ -142,7 +144,7 @@ extern volatile bool force_quit;
> extern uint32_t nb_bufs_in_pool;
>
> extern bool per_port_pool;
> -
> +extern int ip_reassembly_dynfield_offset;
> extern uint32_t mtu_size;
> extern uint32_t frag_tbl_sz;
>
> @@ -186,6 +188,46 @@ core_stats_update_drop(int n)
> core_statistics[lcore_id].dropped += n;
> }
>
> +static inline void
> +core_stats_update_frag_drop(int n)
> +{
> + int lcore_id = rte_lcore_id();
> + core_statistics[lcore_id].frag_dropped += n;
> +}
> +
> +extern uint64_t ip_reassembly_dynflag;
A nit, move this extern next to ip_reassembly_dynfield_offset
Apart from that
Acked-by: Akhil Goyal <gak...@marvell.com>
Also change the patch title as
examples/ipsec-secgw: support per SA HW reassembly
