On Thu, Sep 29, 2022 at 06:19:32AM +0000, Shijith Thotton wrote:
> >> Enabled the flag pmd_iova_as_va in cnxk driver build files as they work
> >> with IOVA as VA. Updated cn9k and cn10k soc build configurations to
> >> enable the IOVA as VA build by default.
> >>
> >> Signed-off-by: Shijith Thotton <sthot...@marvell.com>
> >> ---
> >> config/arm/meson.build | 8 +++-
> >> drivers/common/cnxk/meson.build | 1 +
> >> drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +-
> >> drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +-
> >> drivers/crypto/cnxk/meson.build | 2 +
> >> drivers/dma/cnxk/meson.build | 1 +
> >> drivers/event/cnxk/meson.build | 1 +
> >> drivers/mempool/cnxk/meson.build | 1 +
> >> drivers/net/cnxk/cn10k_tx.h | 55 +++++++-----------------
> >> drivers/net/cnxk/cn9k_tx.h | 55 +++++++-----------------
> >> drivers/net/cnxk/cnxk_ethdev.h | 1 -
> >> drivers/net/cnxk/meson.build | 1 +
> >> drivers/raw/cnxk_bphy/meson.build | 1 +
> >> drivers/raw/cnxk_gpio/meson.build | 1 +
> >> 14 files changed, 50 insertions(+), 84 deletions(-)
> >>
> >> diff --git a/config/arm/meson.build b/config/arm/meson.build
> >> index 9f1636e0d5..4e95e8b388 100644
> >> --- a/config/arm/meson.build
> >> +++ b/config/arm/meson.build
> >> @@ -294,7 +294,8 @@ soc_cn10k = {
> >> 'flags': [
> >> ['RTE_MAX_LCORE', 24],
> >> ['RTE_MAX_NUMA_NODES', 1],
> >> - ['RTE_MEMPOOL_ALIGN', 128]
> >> + ['RTE_MEMPOOL_ALIGN', 128],
> >> + ['RTE_IOVA_AS_VA', 1]
> >> ],
> >> 'part_number': '0xd49',
> >> 'extra_march_features': ['crypto'],
> >> @@ -370,7 +371,10 @@ soc_cn9k = {
> >> 'description': 'Marvell OCTEON 9',
> >> 'implementer': '0x43',
> >> 'part_number': '0xb2',
> >> - 'numa': false
> >> + 'numa': false,
> >> + 'flags': [
> >> + ['RTE_IOVA_AS_VA', 1]
> >> + ]
> >> }
> >
> >I think this could go in a separate patch: "disable IOVA as PA for
> >octeontx2/3"
> >
> >The reason is that this patch clearly breaks the API (m->buf_iova field
> >becomes invalid) and the ABI (mbuf fields are moved) for these
> >architectures. This ABI breakage has to be advertised in the release
> >note. In fact, it should have been advertised before, but I suppose it
> >does not impact general purpose arm distributions, so I guess it is ok.
> >
> >One other thing to highlight: enabling RTE_IOVA_AS_VA means that it
> >disable all drivers that do not have the pmd_iova_as_va flag. Are there
> >use-cases where drivers other than cnxk are used? For instance, is there
> >a PCI bus which is likely to be used by a driver/* ?
> >
>
> All always enable drivers are enabled in this mode, which include
> bus/pci, bus/vdev and mempool/ring.
I was thinking about use cases where a pci PMD (NIC, crypto, ...) is
used in addition to the SOC drivers. These PMD won't compile when IOVA
as PA is disabled, and the use case will be broken.
This is probably a corner case (people at Marvell will know better than
me), I just wanted to highlight it. Should we document it?
Thanks,
Olivier
