From: Kommula Shiva Shankar <kshan...@marvell.com> This patch adds RoC support for Tx completion events via RQ to CQ mapping.
Signed-off-by: Kommula Shiva Shankar <kshan...@marvell.com> --- drivers/common/cnxk/roc_nix.c | 5 ++++- drivers/common/cnxk/roc_nix.h | 2 ++ drivers/common/cnxk/roc_nix_queue.c | 7 ++----- drivers/net/cnxk/cnxk_ethdev.c | 3 +++ 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c index 151d8c3426..4bb306b60e 100644 --- a/drivers/common/cnxk/roc_nix.c +++ b/drivers/common/cnxk/roc_nix.c @@ -154,7 +154,10 @@ roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq, uint32_t nb_txq, return rc; req->rq_cnt = nb_rxq; req->sq_cnt = nb_txq; - req->cq_cnt = nb_rxq; + if (roc_nix->tx_compl_ena) + req->cq_cnt = nb_rxq + nb_txq; + else + req->cq_cnt = nb_rxq; /* XQESZ can be W64 or W16 */ req->xqe_sz = NIX_XQESZ_W16; req->rss_sz = nix->reta_sz; diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 8869cf5169..8cea3232d0 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -287,6 +287,7 @@ struct roc_nix_stats_queue { struct roc_nix_rq { /* Input parameters */ uint16_t qid; + uint16_t cqid; /* Not valid when SSO is enabled */ uint16_t bpf_id; uint64_t aura_handle; bool ipsech_ena; @@ -412,6 +413,7 @@ struct roc_nix { uint16_t max_sqb_count; enum roc_nix_rss_reta_sz reta_sz; bool enable_loop; + bool tx_compl_ena; bool hw_vlan_ins; uint8_t lock_rx_ctx; uint16_t sqb_slack; diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 60303329cc..405d9a8274 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -268,7 +268,7 @@ nix_rq_cn9k_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints, aq->rq.good_utag = rq->tag_mask >> 24; aq->rq.bad_utag = rq->tag_mask >> 24; aq->rq.ltag = rq->tag_mask & BITMASK_ULL(24, 0); - aq->rq.cq = rq->qid; + aq->rq.cq = rq->cqid; } if (rq->ipsech_ena) @@ -395,7 +395,7 @@ nix_rq_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints, bool cfg, aq->rq.good_utag = rq->tag_mask >> 24; aq->rq.bad_utag = rq->tag_mask >> 24; aq->rq.ltag = rq->tag_mask & BITMASK_ULL(24, 0); - aq->rq.cq = rq->qid; + aq->rq.cq = rq->cqid; } if (rq->ipsech_ena) { @@ -644,9 +644,6 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq) if (cq == NULL) return NIX_ERR_PARAM; - if (cq->qid >= nix->nb_rx_queues) - return NIX_ERR_QUEUE_INVALID_RANGE; - qsize = nix_qsize_clampup(cq->nb_desc); cq->nb_desc = nix_qsize_to_val(qsize); cq->qmask = cq->nb_desc - 1; diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 0603d73a90..4ed81c3d98 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -606,6 +606,7 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, /* Setup ROC RQ */ rq = &dev->rqs[qid]; rq->qid = qid; + rq->cqid = cq->qid; rq->aura_handle = mp->pool_id; rq->flow_tag_width = 32; rq->sso_ena = false; @@ -1168,6 +1169,8 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) if (roc_nix_is_lbk(nix)) nix->enable_loop = eth_dev->data->dev_conf.lpbk_mode; + nix->tx_compl_ena = 0; + /* Alloc a nix lf */ rc = roc_nix_lf_alloc(nix, nb_rxq, nb_txq, rx_cfg); if (rc) { -- 2.25.1