Hi,
> -----Original Message-----
> From: Slava Ovsiienko <viachesl...@nvidia.com>
> Sent: Wednesday, August 17, 2022 5:14 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <ma...@nvidia.com>; Raslan Darawsheh
> <rasl...@nvidia.com>; Dmitry Kozlyuk <dkozl...@nvidia.com>;
> sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix the inline length exceeding descriptor limit
>
> The hardware descriptor (WQE) length field is 6 bits wide
> and we have the native limitation for the overall descriptor
> length. To improve the PCIe bandwidth the packet data can be
> inline into descriptor. If PMD was configured to inline large
> amount of data it happened there was no enough space remaining
> in the descriptor to specify all the packet data segments and
> PMD rejected problematic packets.
>
> The patch tries to adjust the inline data length conservatively
> and allows to avoid error occurring.
>
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Fixes: e2259f93ef45 ("net/mlx5: fix Tx when inlining is impossible")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
> Reviewed-by: Dmitry Kozlyuk <dkozl...@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
