Adds code to reset CPT LF as part of cpt_lf_fini.
Signed-off-by: Srujana Challa <scha...@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 82 ++++++++++++++++++++++++++++++++++
drivers/common/cnxk/roc_mbox.h | 6 +++
2 files changed, 88 insertions(+)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index f1be6a3401..a48696f379 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -712,6 +712,87 @@ roc_cpt_lf_ctx_reload(struct roc_cpt_lf *lf, void *cptr)
return 0;
}
+static int
+cpt_lf_reset(struct roc_cpt_lf *lf)
+{
+ struct cpt_lf_rst_req *req;
+ struct dev *dev = lf->dev;
+
+ req = mbox_alloc_msg_cpt_lf_reset(dev->mbox);
+ if (req == NULL)
+ return -EIO;
+
+ req->slot = lf->lf_id;
+
+ return mbox_process(dev->mbox);
+}
+
+static void
+cpt_9k_lf_rst_lmtst(struct roc_cpt_lf *lf, uint8_t egrp)
+{
+ struct cpt_inst_s inst;
+ uint64_t lmt_status;
+
+ memset(&inst, 0, sizeof(struct cpt_inst_s));
+ inst.w7.s.egrp = egrp;
+
+ plt_io_wmb();
+
+ do {
+ /* Copy CPT command to LMTLINE */
+ roc_lmt_mov64((void *)lf->lmt_base, &inst);
+ lmt_status = roc_lmt_submit_ldeor(lf->io_addr);
+ } while (lmt_status == 0);
+}
+
+static void
+cpt_10k_lf_rst_lmtst(struct roc_cpt_lf *lf, uint8_t egrp)
+{
+ uint64_t lmt_base, lmt_arg, io_addr;
+ struct cpt_inst_s *inst;
+ uint16_t lmt_id;
+
+ lmt_base = lf->lmt_base;
+ io_addr = lf->io_addr;
+
+ io_addr |= ROC_CN10K_CPT_INST_DW_M1 << 4;
+ ROC_LMT_BASE_ID_GET(lmt_base, lmt_id);
+
+ inst = (struct cpt_inst_s *)lmt_base;
+ memset(inst, 0, sizeof(struct cpt_inst_s));
+ inst->w7.s.egrp = egrp;
+ lmt_arg = ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id;
+ roc_lmt_submit_steorl(lmt_arg, io_addr);
+}
+
+static void
+roc_cpt_iq_reset(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_inprog lf_inprog = {.u = 0x0};
+ union cpt_lf_ctl lf_ctl = {.u = 0x0};
+
+ lf_inprog.u = plt_read64(lf->rbase + CPT_LF_INPROG);
+ if (((lf_inprog.s.gwb_cnt & 0x1) == 0x1) &&
+ (lf_inprog.s.grb_partial == 0x0)) {
+ lf_inprog.s.grp_drp = 1;
+ plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
+
+ lf_ctl.u = plt_read64(lf->rbase + CPT_LF_CTL);
+ lf_ctl.s.ena = 1;
+ plt_write64(lf_ctl.u, lf->rbase + CPT_LF_CTL);
+
+ if (roc_model_is_cn10k())
+ cpt_10k_lf_rst_lmtst(lf, ROC_CPT_DFLT_ENG_GRP_SE);
+ else
+ cpt_9k_lf_rst_lmtst(lf, ROC_CPT_DFLT_ENG_GRP_SE);
+
+ plt_read64(lf->rbase + CPT_LF_INPROG);
+ plt_delay_us(2);
+ }
+ if (cpt_lf_reset(lf))
+ plt_err("Invalid CPT LF to reset");
+}
+
void
cpt_lf_fini(struct roc_cpt_lf *lf)
{
@@ -720,6 +801,7 @@ cpt_lf_fini(struct roc_cpt_lf *lf)
/* Disable IQ */
roc_cpt_iq_disable(lf);
+ roc_cpt_iq_reset(lf);
/* Free memory */
plt_free(lf->iq_vaddr);
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index 965c704322..b6dee69ac8 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -151,6 +151,7 @@ struct mbox_msghdr {
M(CPT_RXC_TIME_CFG, 0xA06, cpt_rxc_time_cfg, cpt_rxc_time_cfg_req, \
msg_rsp) \
M(CPT_CTX_CACHE_SYNC, 0xA07, cpt_ctx_cache_sync, msg_req, msg_rsp) \
+ M(CPT_LF_RESET, 0xA08, cpt_lf_reset, cpt_lf_rst_req, msg_rsp) \
M(CPT_RX_INLINE_LF_CFG, 0xBFE, cpt_rx_inline_lf_cfg, \
cpt_rx_inline_lf_cfg_msg, msg_rsp) \
M(CPT_GET_CAPS, 0xBFD, cpt_caps_get, msg_req, cpt_caps_rsp_msg) \
@@ -1511,6 +1512,11 @@ struct cpt_eng_grp_rsp {
uint8_t __io eng_grp_num;
};
+struct cpt_lf_rst_req {
+ struct mbox_msghdr hdr;
+ uint32_t __io slot;
+};
+
/* REE mailbox error codes
* Range 1001 - 1100.
*/
--
2.25.1
