On 6/8/22 10:41, David Marchand wrote:
On Tue, May 31, 2022 at 4:14 PM Stanislaw Kardach <k...@semihalf.com> wrote:This patchset adds support for building and running DPDK on 64bit RISC-V architecture. The initial support targets rv64gc (rv64imafdc) ISA and was tested on SiFive Unmatched development board with the Freedom U740 SoC running Linux (freedom-u-sdk based kernel). I have tested this codebase using DPDK unit and perf tests as well as test-pmd, l2fwd and l3fwd examples. The NIC attached to the DUT was Intel X520-DA2 which uses ixgbe PMD. On the UIO side, since U740 does not have an IOMMU, I've used igb_uio, uio_pci_generic and vfio-pci noiommu drivers. Functional verification done using meson tests. fast-tests suite passing with the default config. PMD verification done using a Intel x520-DA2 NIC (ixgbe) and the test-pmd application. Packet transfer checked using all UIO drivers available for non-IOMMU platforms: uio_pci_generic, vfio-pci noiommu and igb_uio. The i40e PMD driver is disabled on RISC-V as the rv64gc ISA has no vector operations. RISCV support is currently limited to Linux as the time measurement frequency discovery is tied to reading a device-tree node via procfs. Clang compilation currently not supported due to issues with missing relocation relaxation. Commit 1 introduces EAL and build system support for RISC-V architecture as well as documentation updates. Commits 2-5 add missing defines and stubs to enable RISC-V operation in non-EAL parts. Commit 6 adds RISC-V specific cpuflags test. Commits 7-8 add RISC-V build testing to test-meson-builds.sh and github CI.Overall, the series lgtm. It did not get much reviews, but the porting is straightforward and clean enough. I'm waiting for some compilation to finish and I will merge it for 22.07-rc1. Some comments that will probably require some followup patches for rc2: - I removed the known issue about --no-huge from the EAL patch. This seems to be a generic issue that does not block the RISC V port and can be re-submitted as a separate patch. - I had some trouble with finding a right toolchain for test-meson-builds.sh. The mentionned toolchains in the cross build guide don't work for me on FC36. I managed to cross compile with a Bootlin toolchain, though I had to adjust the cross compilation file. I'll probably end up compiling my own toolchain later unless you have a better idea.
Please, consider building natively too. https://wiki.ubuntu.com/RISC-V describes setting setting up a virtual machine.
At least the compilation in GHA works. - The hardcoded pkg-config path in config/riscv/riscv64_linux_gcc does not seem generic. It is probably not a big issue, but I'd rather move it to a Ubuntu specific cross compile meson file. WDYT? - I adjusted some coding style in some asm and some indentation and wording in meson. - The cross compilation guide mentions using crossbuild-essential-riscv64 for Ubuntu. We should switch to it in GHA. Though after trying myself, there is an issue in the C++ headers check in GHA for some acl header including rte_vect.h. Can you have a look? - There was a patch from Heinrich about native compilation, can you review it?
[PATCH] Fix RISC-V builds http://mails.dpdk.org/archives/dev/2022-May/242749.html relates to PktGen. Best regards Heinrich
