Hi Chenbo, Thanks for your reply. I will address in next version.
> -----Original Message----- > From: Xia, Chenbo <chenbo....@intel.com> > Sent: Monday, May 23, 2022 3:56 PM > To: Pei, Andy <andy....@intel.com>; dev@dpdk.org > Cc: maxime.coque...@redhat.com; Cao, Gang <gang....@intel.com>; Liu, > Changpeng <changpeng....@intel.com>; Xu, Rosen <rosen...@intel.com>; > Xiao, QimaiX <qimaix.x...@intel.com> > Subject: RE: [PATCH v8 13/13] vdpa/ifc/base: access correct register for blk > device > > > -----Original Message----- > > From: Pei, Andy <andy....@intel.com> > > Sent: Wednesday, May 18, 2022 8:14 PM > > To: dev@dpdk.org > > Cc: Xia, Chenbo <chenbo....@intel.com>; maxime.coque...@redhat.com; > > Cao, Gang <gang....@intel.com>; Liu, Changpeng > > <changpeng....@intel.com>; Xu, Rosen <rosen...@intel.com>; Xiao, > > QimaiX <qimaix.x...@intel.com> > > Subject: [PATCH v8 13/13] vdpa/ifc/base: access correct register for > > blk device > > > > Register address is different between net and blk device. > > We are re-use most of the code, when register address is > > Re-using > > With this fixed: > > Reviewed-by: Chenbo Xia <chenbo....@intel.com> > > > different, we have to check net and blk device go through different > > code. > > > > Signed-off-by: Andy Pei <andy....@intel.com> > > --- > > drivers/vdpa/ifc/base/ifcvf.c | 34 +++++++++++++++++++++++++++------- > > 1 file changed, 27 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/vdpa/ifc/base/ifcvf.c > > b/drivers/vdpa/ifc/base/ifcvf.c index d10c1fd..dd475a7 100644 > > --- a/drivers/vdpa/ifc/base/ifcvf.c > > +++ b/drivers/vdpa/ifc/base/ifcvf.c > > @@ -218,10 +218,17 @@ > > &cfg->queue_used_hi); > > IFCVF_WRITE_REG16(hw->vring[i].size, &cfg->queue_size); > > > > - *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET + > > - (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) = > > - (u32)hw->vring[i].last_avail_idx | > > - ((u32)hw->vring[i].last_used_idx << 16); > > + if (hw->device_type == IFCVF_BLK) > > + *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET + > > + i * IFCVF_LM_CFG_SIZE) = > > + (u32)hw->vring[i].last_avail_idx | > > + ((u32)hw->vring[i].last_used_idx << 16); > > + else > > + *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET + > > + (i / 2) * IFCVF_LM_CFG_SIZE + > > + (i % 2) * 4) = > > + (u32)hw->vring[i].last_avail_idx | > > + ((u32)hw->vring[i].last_used_idx << 16); > > > > IFCVF_WRITE_REG16(i + 1, &cfg->queue_msix_vector); > > if (IFCVF_READ_REG16(&cfg->queue_msix_vector) == @@ - > 254,9 +261,22 > > @@ > > IFCVF_WRITE_REG16(i, &cfg->queue_select); > > IFCVF_WRITE_REG16(0, &cfg->queue_enable); > > IFCVF_WRITE_REG16(IFCVF_MSI_NO_VECTOR, &cfg- > > >queue_msix_vector); > > - ring_state = *(u32 *)(hw->lm_cfg + > IFCVF_LM_RING_STATE_OFFSET > > + > > - (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4); > > - hw->vring[i].last_avail_idx = (u16)(ring_state >> 16); > > + > > + if (hw->device_type == IFCVF_BLK) > > + ring_state = *(u32 *)(hw->lm_cfg + > > + IFCVF_LM_RING_STATE_OFFSET + > > + i * IFCVF_LM_CFG_SIZE); > > + else > > + ring_state = *(u32 *)(hw->lm_cfg + > > + IFCVF_LM_RING_STATE_OFFSET + > > + (i / 2) * IFCVF_LM_CFG_SIZE + > > + (i % 2) * 4); > > + > > + if (hw->device_type == IFCVF_BLK) > > + hw->vring[i].last_avail_idx = > > + (u16)(ring_state & IFCVF_16_BIT_MASK); > > + else > > + hw->vring[i].last_avail_idx = (u16)(ring_state >> 16); > > hw->vring[i].last_used_idx = (u16)(ring_state >> 16); > > } > > } > > -- > > 1.8.3.1
