> -----Original Message-----
> From: Ruifeng Wang <ruifeng.w...@arm.com>
> Sent: Tuesday, January 4, 2022 5:01 AM
> To: Matan Azrad <ma...@nvidia.com>; Slava Ovsiienko
> <viachesl...@nvidia.com>
> Cc: dev@dpdk.org; honnappa.nagaraha...@arm.com; sta...@dpdk.org;
> n...@arm.com; Ruifeng Wang <ruifeng.w...@arm.com>
> Subject: [PATCH] net/mlx5: fix risk in Rx descriptor read in NEON vector path
>
> In NEON vector PMD, vector load loads two contiguous 8B of
> descriptor data into vector register. Given vector load ensures no
> 16B atomicity, read of the word that includes op_own field could be
> reordered after read of other words. In this case, some words could
> contain invalid data.
>
> Reloaded qword0 after read barrier to update vector register. This
> ensures that the fetched data is correct.
>
> Testpmd single core test on N1SDP/ThunderX2 showed no performance
> drop.
>
> Fixes: 1742c2d9fab0 ("net/mlx5: fix synchronization on polling Rx
> completions")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Ruifeng Wang <ruifeng.w...@arm.com>
> ---
Tested with BlueField-2 and didn't see a performance impact.
Tested-by: Ali Alnubani <alia...@nvidia.com>
Thanks,
Ali
