From: Vidya Sagar Velumuri <vvelum...@marvell.com>
Add new API to configure the SA table entries with new CPT PKIND
when timestamp is enabled.
Signed-off-by: Vidya Sagar Velumuri <vvelum...@marvell.com>
Acked-by: Ray Kinsella <m...@ashroe.eu>
---
drivers/common/cnxk/roc_nix_inl.c | 59 ++++++++++++++++++++++++++++++++++
drivers/common/cnxk/roc_nix_inl.h | 2 ++
drivers/common/cnxk/roc_nix_inl_priv.h | 1 +
drivers/common/cnxk/version.map | 1 +
4 files changed, 63 insertions(+)
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index 569b7f6..d68615a 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -1013,6 +1013,65 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void
*sa_dptr, void *sa_cptr,
return -ENOTSUP;
}
+int
+roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena, bool
inb_inl_dev)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+ struct nix_inl_dev *inl_dev = NULL;
+ void *sa, *sa_base = NULL;
+ struct nix *nix = NULL;
+ uint16_t max_spi = 0;
+ uint8_t pkind = 0;
+ int i;
+
+ if (roc_model_is_cn9k())
+ return 0;
+
+ if (!inb_inl_dev && (roc_nix == NULL))
+ return -EINVAL;
+
+ if (inb_inl_dev) {
+ if ((idev == NULL) || (idev->nix_inl_dev == NULL))
+ return 0;
+ inl_dev = idev->nix_inl_dev;
+ } else {
+ nix = roc_nix_to_nix_priv(roc_nix);
+ if (!nix->inl_inb_ena)
+ return 0;
+ sa_base = nix->inb_sa_base;
+ max_spi = roc_nix->ipsec_in_max_spi;
+ }
+
+ if (inl_dev) {
+ if (inl_dev->rq_refs == 0) {
+ inl_dev->ts_ena = ts_ena;
+ max_spi = inl_dev->ipsec_in_max_spi;
+ sa_base = inl_dev->inb_sa_base;
+ } else if (inl_dev->ts_ena != ts_ena) {
+ if (inl_dev->ts_ena)
+ plt_err("Inline device is already configured
with TS enable");
+ else
+ plt_err("Inline device is already configured
with TS disable");
+ return -ENOTSUP;
+ } else {
+ return 0;
+ }
+ }
+
+ pkind = ts_ena ? ROC_IE_OT_CPT_TS_PKIND : ROC_IE_OT_CPT_PKIND;
+
+ sa = (uint8_t *)sa_base;
+ if (pkind == ((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind)
+ return 0;
+
+ for (i = 0; i < max_spi; i++) {
+ sa = ((uint8_t *)sa_base) +
+ (i * ROC_NIX_INL_OT_IPSEC_INB_SA_SZ);
+ ((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind = pkind;
+ }
+ return 0;
+}
+
void
roc_nix_inl_dev_lock(void)
{
diff --git a/drivers/common/cnxk/roc_nix_inl.h
b/drivers/common/cnxk/roc_nix_inl.h
index 2c2a4d7..633f090 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -174,6 +174,8 @@ int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix
*roc_nix,
uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void);
int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,
uint16_t max_frags);
+int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,
+ bool inb_inl_dev);
/* NIX Inline Outbound API */
int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/roc_nix_inl_priv.h
b/drivers/common/cnxk/roc_nix_inl_priv.h
index 0fa5e09..f9646a3 100644
--- a/drivers/common/cnxk/roc_nix_inl_priv.h
+++ b/drivers/common/cnxk/roc_nix_inl_priv.h
@@ -76,6 +76,7 @@ struct nix_inl_dev {
uint32_t inb_spi_mask;
bool attach_cptlf;
bool wqe_skip;
+ bool ts_ena;
};
int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 2a122e5..53586da 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -159,6 +159,7 @@ INTERNAL {
roc_nix_inl_outb_is_enabled;
roc_nix_inl_outb_soft_exp_poll_switch;
roc_nix_inl_sa_sync;
+ roc_nix_inl_ts_pkind_set;
roc_nix_inl_ctx_write;
roc_nix_inl_dev_pffunc_get;
roc_nix_cpt_ctx_cache_sync;
--
2.8.4
