From: Vidya Sagar Velumuri <vvelum...@marvell.com>
When reassembly is enabled by application, set corresponding
flags in SA during creation.
Provide roc API to configure reassembly unit with active and zombie limits
and step size
Signed-off-by: Vidya Sagar Velumuri <vvelum...@marvell.com>
---
drivers/common/cnxk/cnxk_security.c | 5 ++++-
drivers/common/cnxk/roc_nix_inl.c | 24 ++++++++++++++++++++++++
drivers/common/cnxk/roc_nix_inl.h | 7 +++++++
drivers/common/cnxk/version.map | 1 +
4 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/cnxk_security.c
b/drivers/common/cnxk/cnxk_security.c
index 30562b46e3..9bd85fc4b4 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -295,9 +295,12 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
* second pass meta and no defrag.
*/
sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
- sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG;
+ sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG;
sa->w0.s.pkind = ROC_OT_CPT_META_PKIND;
+ if (ipsec_xfrm->options.reass_en)
+ sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG;
+
/* ESN */
sa->w2.s.esn_en = !!ipsec_xfrm->options.esn;
if (ipsec_xfrm->options.udp_encap) {
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index f0fc690417..5251b51f9e 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -200,6 +200,30 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool
inb_inl_dev, uint32_t spi)
return (sa_base + (spi * sz));
}
+int
+roc_nix_reass_configure(uint32_t max_wait_time, uint16_t max_frags)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+ struct roc_cpt *roc_cpt;
+ struct roc_cpt_rxc_time_cfg cfg;
+
+ (void)max_frags;
+ roc_cpt = idev->cpt;
+ if (!roc_cpt) {
+ plt_err("Cannot support inline inbound, cryptodev not probed");
+ return -ENOTSUP;
+ }
+
+ cfg.step = (max_wait_time * 1000 / ROC_NIX_INL_REAS_ACTIVE_LIMIT);
+ cfg.zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT;
+ cfg.zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD;
+ cfg.active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT;
+ cfg.active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD;
+
+ roc_cpt_rxc_time_cfg(roc_cpt, &cfg);
+ return 0;
+}
+
int
roc_nix_inl_inb_init(struct roc_nix *roc_nix)
{
diff --git a/drivers/common/cnxk/roc_nix_inl.h
b/drivers/common/cnxk/roc_nix_inl.h
index abbeac684a..73a17276c4 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -43,6 +43,11 @@
/* Alignment of SA Base */
#define ROC_NIX_INL_SA_BASE_ALIGN BIT_ULL(16)
+#define ROC_NIX_INL_REAS_ACTIVE_LIMIT 0xFFF
+#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10
+#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF
+#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10
+
static inline struct roc_onf_ipsec_inb_sa *
roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx)
{
@@ -124,6 +129,8 @@ void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev
*roc_inl_dev);
bool __roc_api roc_nix_inl_dev_is_probed(void);
void __roc_api roc_nix_inl_dev_lock(void);
void __roc_api roc_nix_inl_dev_unlock(void);
+int __roc_api roc_nix_reass_configure(uint32_t max_wait_time,
+ uint16_t max_frags);
/* NIX Inline Inbound API */
int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 5a03b91784..eab6e6a432 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -204,6 +204,7 @@ INTERNAL {
roc_nix_ptp_tx_ena_dis;
roc_nix_queues_ctx_dump;
roc_nix_ras_intr_ena_dis;
+ roc_nix_reass_configure;
roc_nix_register_cq_irqs;
roc_nix_register_queue_irqs;
roc_nix_rq_dump;
--
2.25.1
