> -----Original Message-----
> From: Stephen Douthit <steph...@silicom-usa.com>
> Sent: Tuesday, December 7, 2021 06:19
> To: Wang, Haiyue <haiyue.w...@intel.com>; Lu, Wenzhuo <wenzhuo...@intel.com>;
> Changchun Ouyang
> <changchun.ouy...@intel.com>; Zhang, Helin <helin.zh...@intel.com>
> Cc: dev@dpdk.org; Wen Wang <w...@silicom-usa.com>; Stephen Douthit
> <steph...@silicom-usa.com>;
> sta...@dpdk.org
> Subject: [PATCH v2 3/7] net/ixgbe: Check that SFF-8472 soft rate select is
> supported before write
>
> Make sure an SFP is really a SFF-8472 device that supports the optional
> soft rate select feature before just blindly poking those I2C registers.
>
> Skip all I2C traffic if we know there's no SFP.
>
> Fixes: f3430431aba ("ixgbe/base: add SFP+ dual-speed support")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Stephen Douthit <steph...@silicom-usa.com>
> ---
> /* Set RS0 */
> status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,
> IXGBE_I2C_EEPROM_DEV_ADDR2,
> diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h
> b/drivers/net/ixgbe/base/ixgbe_phy.h
> index ceefbb3e68..cd57ce040f 100644
> --- a/drivers/net/ixgbe/base/ixgbe_phy.h
> +++ b/drivers/net/ixgbe/base/ixgbe_phy.h
> @@ -21,6 +21,7 @@
> #define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
> #define IXGBE_SFF_CABLE_SPEC_COMP 0x3C
> #define IXGBE_SFF_SFF_8472_SWAP 0x5C
> +#define IXGBE_SFF_SFF_8472_EOPT 0x5D
Looks like this is YOUR platform specific, then this patchset can't be
merged. : - (
> #define IXGBE_SFF_SFF_8472_COMP 0x5E
> #define IXGBE_SFF_SFF_8472_OSCB 0x6E
> #define IXGBE_SFF_SFF_8472_ESCB 0x76
> @@ -48,6 +49,8 @@
> #define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8
> --
> 2.31.1
