On Tue, Nov 16, 2021 at 3:10 PM Bruce Richardson <bruce.richard...@intel.com> wrote: > > On Tue, Nov 16, 2021 at 02:53:49PM +0100, David Marchand wrote: > > On Fri, Nov 12, 2021 at 3:17 PM Vladimir Medvedkin > > <vladimir.medved...@intel.com> wrote: > > > > > > 1. This patch replaces _mm512_set_epi8 with _mm512_set_epi32 > > > due to the lack of support by some compilers. > > > > Ok, it was the initial report from Lance. > > > > > 2. This patch checks if AVX512F is supported along with GFNI. > > > This is done if the code is built on a platform that supports GFNI, > > > but does not support AVX512. > > > > Ok. > > > > > 3. Also this patch fixes compilation problems on 32bit arch due to > > > lack of support for _mm_extract_epi64() by implementing XOR folding > > > with _mm_extract_epi32() on 32-bit arch. > > > > This code is under a #if defined(__GFNI__) && defined(__AVX512F__). > > > > Does such a 32 bits processor exist, that supports AVX512 and GFNI? > > > The processor would be 64-bit but the code could well be 32-bit, and even > then can still use these AVX512 instruction sets.
Oh, thanks for the explanation. -- David Marchand
