On Wed, Nov 10, 2021 at 9:39 AM Anoob Joseph <ano...@marvell.com> wrote:
>
> The memory allocated for temporarily keeping DPTR need to be freed after
> operation.
>
> Also, dptr need to be aligned to 8B.
>
> Fixes: e0bf49f7622b ("common/cnxk: add code to write CPT CTX through
> microcode op")
> Cc: scha...@marvell.com
>
> Signed-off-by: Anoob Joseph <ano...@marvell.com>
> Reviewed-by: Nithin Kumar Dabilpuram <ndabilpu...@marvell.com>
> Reviewed-by: Tejasree Kondoj <ktejas...@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_cpt.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
> index 5c8c328..51cd612 100644
> --- a/drivers/common/cnxk/roc_cpt.c
> +++ b/drivers/common/cnxk/roc_cpt.c
> @@ -930,12 +930,14 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr,
> void *sa_cptr,
> plt_err("Couldn't allocate memory for result address");
> return -ENOMEM;
> }
> - dptr = plt_zmalloc(sa_len, 0);
> - if (!dptr) {
> +
> + dptr = plt_zmalloc(sa_len, 8);
> + if (dptr == NULL) {
> plt_err("Couldn't allocate memory for SA dptr");
> plt_free(res);
> return -ENOMEM;
> }
> +
> for (i = 0; i < (sa_len / 8); i++)
> dptr[i] = plt_cpu_to_be_64(((uint64_t *)sa_dptr)[i]);
>
> @@ -962,6 +964,7 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr,
> void *sa_cptr,
> plt_delay_ms(1);
>
> plt_free(res);
> + plt_free(dptr);
>
> return 0;
> }
> --
> 2.7.4
>
