<snip>

> 
> Covert rte_atomic_test_and_set usage to compiler atomic CAS operation for
   ^^^^^^ Convert

> display sync in crypto cases.
> 
> Signed-off-by: Joyce Kong <joyce.k...@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.w...@arm.com>
With the above typo fixed,
Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>

> ---
>  app/test-crypto-perf/cperf_test_latency.c        | 6 ++++--
>  app/test-crypto-perf/cperf_test_pmd_cyclecount.c | 9 ++++++---
>  app/test-crypto-perf/cperf_test_throughput.c     | 9 ++++++---
>  app/test-crypto-perf/cperf_test_verify.c         | 9 ++++++---
>  4 files changed, 22 insertions(+), 11 deletions(-)
> 
> diff --git a/app/test-crypto-perf/cperf_test_latency.c b/app/test-crypto-
> perf/cperf_test_latency.c
> index 159fe8492b..5e73c75fba 100644
> --- a/app/test-crypto-perf/cperf_test_latency.c
> +++ b/app/test-crypto-perf/cperf_test_latency.c
> @@ -126,7 +126,7 @@ cperf_latency_test_runner(void *arg)
>       uint8_t burst_size_idx = 0;
>       uint32_t imix_idx = 0;
> 
> -     static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
> +     static uint16_t display_once;
> 
>       if (ctx == NULL)
>               return 0;
> @@ -308,7 +308,9 @@ cperf_latency_test_runner(void *arg)
>               time_min = tunit*(double)(tsc_min) / tsc_hz;
> 
>               if (ctx->options->csv) {
> -                     if (rte_atomic16_test_and_set(&display_once))
> +                     uint16_t exp = 0;
> +                     if (__atomic_compare_exchange_n(&display_once,
> &exp, 1, 0,
> +                                     __ATOMIC_RELAXED,
> __ATOMIC_RELAXED))
>                               printf("\n# lcore, Buffer Size, Burst Size, Pakt
> Seq #, "
>                                               "cycles, time (us)");
> 
> diff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test-
> crypto-perf/cperf_test_pmd_cyclecount.c
> index 844659aeca..a1de334efb 100644
> --- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c
> +++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c
> @@ -404,7 +404,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
>       state.lcore = rte_lcore_id();
>       state.linearize = 0;
> 
> -     static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
> +     static uint16_t display_once;
>       static bool warmup = true;
> 
>       /*
> @@ -449,8 +449,10 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
>                       continue;
>               }
> 
> +             uint16_t exp = 0;
>               if (!opts->csv) {
> -                     if (rte_atomic16_test_and_set(&display_once))
> +                     if (__atomic_compare_exchange_n(&display_once,
> &exp, 1, 0,
> +                                     __ATOMIC_RELAXED,
> __ATOMIC_RELAXED))
>                               printf(PRETTY_HDR_FMT, "lcore id", "Buf
> Size",
>                                               "Burst Size", "Enqueued",
>                                               "Dequeued", "Enq Retries",
> @@ -466,7 +468,8 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
>                                       state.cycles_per_enq,
>                                       state.cycles_per_deq);
>               } else {
> -                     if (rte_atomic16_test_and_set(&display_once))
> +                     if (__atomic_compare_exchange_n(&display_once,
> &exp, 1, 0,
> +                                     __ATOMIC_RELAXED,
> __ATOMIC_RELAXED))
>                               printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
>                                               "Burst Size", "Enqueued",
>                                               "Dequeued", "Enq Retries",
> diff --git a/app/test-crypto-perf/cperf_test_throughput.c b/app/test-crypto-
> perf/cperf_test_throughput.c
> index f6eb8cf259..1407007c6e 100644
> --- a/app/test-crypto-perf/cperf_test_throughput.c
> +++ b/app/test-crypto-perf/cperf_test_throughput.c
> @@ -106,7 +106,7 @@ cperf_throughput_test_runner(void *test_ctx)
>       uint8_t burst_size_idx = 0;
>       uint32_t imix_idx = 0;
> 
> -     static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
> +     static uint16_t display_once;
> 
>       struct rte_crypto_op *ops[ctx->options->max_burst_size];
>       struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
> @@ -272,8 +272,10 @@ cperf_throughput_test_runner(void *test_ctx)
>               double cycles_per_packet = ((double)tsc_duration /
>                               ctx->options->total_ops);
> 
> +             uint16_t exp = 0;
>               if (!ctx->options->csv) {
> -                     if (rte_atomic16_test_and_set(&display_once))
> +                     if (__atomic_compare_exchange_n(&display_once,
> &exp, 1, 0,
> +                                     __ATOMIC_RELAXED,
> __ATOMIC_RELAXED))
> 
>       printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
>                                       "lcore id", "Buf Size", "Burst Size",
>                                       "Enqueued", "Dequeued", "Failed
> Enq", @@ -293,7 +295,8 @@ cperf_throughput_test_runner(void *test_ctx)
>                                       throughput_gbps,
>                                       cycles_per_packet);
>               } else {
> -                     if (rte_atomic16_test_and_set(&display_once))
> +                     if (__atomic_compare_exchange_n(&display_once,
> &exp, 1, 0,
> +                                     __ATOMIC_RELAXED,
> __ATOMIC_RELAXED))
>                               printf("#lcore id,Buffer Size(B),"
>                                       "Burst
> Size,Enqueued,Dequeued,Failed Enq,"
>                                       "Failed
> Deq,Ops(Millions),Throughput(Gbps),"
> diff --git a/app/test-crypto-perf/cperf_test_verify.c b/app/test-crypto-
> perf/cperf_test_verify.c
> index 2939aeaa93..0c053ad3c0 100644
> --- a/app/test-crypto-perf/cperf_test_verify.c
> +++ b/app/test-crypto-perf/cperf_test_verify.c
> @@ -241,7 +241,7 @@ cperf_verify_test_runner(void *test_ctx)
>       uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;
>       uint64_t ops_failed = 0;
> 
> -     static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
> +     static uint16_t display_once;
> 
>       uint64_t i;
>       uint16_t ops_unused = 0;
> @@ -383,8 +383,10 @@ cperf_verify_test_runner(void *test_ctx)
>               ops_deqd_total += ops_deqd;
>       }
> 
> +     uint16_t exp = 0;
>       if (!ctx->options->csv) {
> -             if (rte_atomic16_test_and_set(&display_once))
> +             if (__atomic_compare_exchange_n(&display_once, &exp, 1,
> 0,
> +                             __ATOMIC_RELAXED, __ATOMIC_RELAXED))
> 
>       printf("%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
>                               "lcore id", "Buf Size", "Burst size",
>                               "Enqueued", "Dequeued", "Failed Enq", @@ -
> 401,7 +403,8 @@ cperf_verify_test_runner(void *test_ctx)
>                               ops_deqd_failed,
>                               ops_failed);
>       } else {
> -             if (rte_atomic16_test_and_set(&display_once))
> +             if (__atomic_compare_exchange_n(&display_once, &exp, 1,
> 0,
> +                             __ATOMIC_RELAXED, __ATOMIC_RELAXED))
>                       printf("\n# lcore id, Buffer Size(B), "
>                               "Burst Size,Enqueued,Dequeued,Failed Enq,"
>                               "Failed Deq,Failed Ops\n");
> --
> 2.17.1

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