11/10/2021 09:33, Chengwen Feng:
> +Device Configuration
> +~~~~~~~~~~~~~~~~~~~~
> +
> +The rte_dma_configure API is used to configure a DMA device.
> +
> +.. code-block:: c
> +
> + int rte_dma_configure(int16_t dev_id,
> + const struct rte_dma_conf *dev_conf);
> +
> +The ``rte_dma_conf`` structure is used to pass the configuration parameters
> +for the DMA device.
> +
> +
> +Configuration of Virtual DMA Channels
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +The rte_dma_vchan_setup API is used to configure a virtual DMA channel.
> +
> +.. code-block:: c
> +
> + int rte_dma_vchan_setup(int16_t dev_id, uint16_t vchan,
> + const struct rte_dma_vchan_conf *conf);
> +
> +The ``rte_dma_vchan_conf`` structure is used to pass the configuration
> +parameters for the virtual DMA channel.
I think those 2 above sections don't bring anything in the guide.
Functions are described in Doxygen comments, it is enough.
> --- a/doc/guides/rel_notes/release_21_11.rst
> +++ b/doc/guides/rel_notes/release_21_11.rst
> @@ -144,6 +144,7 @@ New Features
> * **Introduced dmadev library with:**
>
> * Device allocation functions.
> + * Control plane API.
This is not a feature, you can drop from the release notes.
[...]
> +/**@{@name DMA capability
> + * @see struct rte_dma_info::dev_capa
> + */
Thank you for using Doxygen grouping.
> +#define RTE_DMA_CAPA_MEM_TO_MEM RTE_BIT64(0)
> +/**< Support memory-to-memory transfer */
Would it be possible to put the comment before the flag?
> +#define RTE_DMA_CAPA_MEM_TO_DEV RTE_BIT64(1)
> +/**< Support memory-to-device transfer. */
> +#define RTE_DMA_CAPA_DEV_TO_MEM RTE_BIT64(2)
> +/**< Support device-to-memory transfer. */
> +#define RTE_DMA_CAPA_DEV_TO_DEV RTE_BIT64(3)
> +/**< Support device-to-device transfer. */
> +#define RTE_DMA_CAPA_SVA RTE_BIT64(4)
> +/**< Support SVA which could use VA as DMA address.
> + * If device support SVA then application could pass any VA address like
> memory
> + * from rte_malloc(), rte_memzone(), malloc, stack memory.
> + * If device don't support SVA, then application should pass IOVA address
> which
> + * from rte_malloc(), rte_memzone().
> + */
> +#define RTE_DMA_CAPA_SILENT RTE_BIT64(5)
> +/**< Support work in silent mode.
> + * In this mode, application don't required to invoke rte_dma_completed*()
> + * API.
> + * @see struct rte_dma_conf::silent_mode
> + */
> +#define RTE_DMA_CAPA_OPS_COPY RTE_BIT64(32)
> +/**< Support copy operation.
> + * This capability start with index of 32, so that it could leave gap between
> + * normal capability and ops capability.
> + */
> +#define RTE_DMA_CAPA_OPS_COPY_SG RTE_BIT64(33)
> +/**< Support scatter-gather list copy operation. */
> +#define RTE_DMA_CAPA_OPS_FILL RTE_BIT64(34)
> +/**< Support fill operation. */
> +/**@}*/
