Hello Thomas,
Sunday, June 28, 2015, 9:38:14 PM, you wrote:
> 2015-06-28 10:59, Matthew Hall:
>> It would appear there is some bug in the new lock elision patches that is
>> preventing it from compiling with clang. Any suggestions?
> It builds with clang.
> My suggestion is to add the patch author in recipient's list ;)
>> On Jun 28, 2015, at 10:16 AM, Matthew Hall <mhall at mhcomputing.net> wrote:
>>
>> > Hi all,
>> >
>> > I am getting a strange error compiling some RTM instructions when I
>> > upgraded my VM environment from VirtualBox 4 to VirtualBox 5 and AVX
>> > instructions from the host CPU became available. However when I am reading
>> > the opcode description for XABORT it supposedly allows an immediate
>> > operand for the argument so I can't understand why this code would not
>> > compile. Any advice?
>> >
>> > CC test_hash_scaling.o
>> > In file included from
>> > /vagrant/external/dpdk/app/test/test_hash_scaling.c:37:
>> > In file included from
>> > /vagrant/external/dpdk/build/include/rte_spinlock.h:42:
>> > /vagrant/external/dpdk/build/include/rte_rtm.h:56:15: error: invalid
>> > operand for inline asm constraint 'i'
>> > asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory");
>> >
>> > Matthew.
>>
It looks like a compiler bug for me. In the meantime Clang should
have native TSX intrinsics (but most compilers fail to implement
them correctly on a first attempt allowing instruction reordering). Could
you try this workaround:
diff --git a/lib/librte_eal/common/include/arch/x86/rte_rtm.h
b/lib/librte_eal/common/include/arch/x86/rte_rtm.h
index d935641..ee73dd4 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_rtm.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_rtm.h
@@ -50,10 +50,14 @@ void rte_xend(void)
asm volatile(".byte 0x0f,0x01,0xd5" ::: "memory");
}
+#include <immintrin.h>
+
static __attribute__((__always_inline__)) inline
void rte_xabort(const unsigned int status)
{
- asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory");
+ asm volatile(::: "memory");
+ _xabort(status);
+ asm volatile(::: "memory");
}
static __attribute__((__always_inline__)) inline
--
Best regards,
Roman mailto:roman.dementiev at intel.com
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