On 9/6/2021 3:02 AM, Robin Zhang wrote:
> This change increments X722 API version and adds new constants related to
> the extended implementation of Security Version Opt-In.
>
There are new 'I40E_AQ_RREV_MODULE_PHY_*' macros, what is their relation with
"Security Version Opt-In"?
Also title mentions "Min Rollback Revision for 4 more X722 modules", is this
referred 4 more modules are 'I40E_AQ_RREV_MODULE_PHY_*', is added macros for
"Security Version Opt-In" or "Min Rollback Revision"?
And what does "Min Rollback Revision" mean? And why first letters of words are
upper case?
Overall can you please add a little more clarification to the commit log?
> Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszc...@intel.com>
> Signed-off-by: Robin Zhang <robinx.zh...@intel.com>
> ---
> drivers/net/i40e/base/i40e_adminq_cmd.h | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h
> b/drivers/net/i40e/base/i40e_adminq_cmd.h
> index 2ca41db5d3..a96527f31c 100644
> --- a/drivers/net/i40e/base/i40e_adminq_cmd.h
> +++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
> @@ -12,7 +12,7 @@
> */
>
> #define I40E_FW_API_VERSION_MAJOR 0x0001
> -#define I40E_FW_API_VERSION_MINOR_X722 0x000B
> +#define I40E_FW_API_VERSION_MINOR_X722 0x000C
> #define I40E_FW_API_VERSION_MINOR_X710 0x000C
>
> #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
> @@ -2425,11 +2425,15 @@ struct i40e_aqc_rollback_revision_update {
> u8 optin_mode; /* bool */
> #define I40E_AQ_RREV_OPTION_MODE 0x01
> u8 module_selected;
> -#define I40E_AQ_RREV_MODULE_PCIE_ANALOG 0
> -#define I40E_AQ_RREV_MODULE_PHY_ANALOG 1
> -#define I40E_AQ_RREV_MODULE_OPTION_ROM 2
> -#define I40E_AQ_RREV_MODULE_EMP_IMAGE 3
> -#define I40E_AQ_RREV_MODULE_PE_IMAGE 4
> +#define I40E_AQ_RREV_MODULE_PCIE_ANALOG 0
> +#define I40E_AQ_RREV_MODULE_PHY_ANALOG 1
> +#define I40E_AQ_RREV_MODULE_OPTION_ROM 2
> +#define I40E_AQ_RREV_MODULE_EMP_IMAGE 3
> +#define I40E_AQ_RREV_MODULE_PE_IMAGE 4
> +#define I40E_AQ_RREV_MODULE_PHY_PLL_O_CONFIGURATION 5
> +#define I40E_AQ_RREV_MODULE_PHY_0_CONFIGURATION 6
> +#define I40E_AQ_RREV_MODULE_PHY_PLL_1_CONFIGURATION 7
> +#define I40E_AQ_RREV_MODULE_PHY_1_CONFIGURATION 8
> u8 reserved1[2];
> u32 min_rrev;
> u8 reserved2[8];
>
