Add support for configurable number of loops through the input PCAP
file for the source port. Added an additional parameter to source
port CLI command.
Signed-off-by: Yogesh Jangra <yogesh.jan...@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitre...@intel.com>
---
examples/pipeline/cli.c | 17 ++++++++++++++---
.../pipeline/examples/l2fwd_macswp_pcap.cli | 10 +++++-----
examples/pipeline/examples/l2fwd_pcap.cli | 10 +++++-----
examples/pipeline/examples/vxlan_pcap.cli | 12 ++++++------
lib/port/rte_swx_port_source_sink.c | 9 ++++++++-
lib/port/rte_swx_port_source_sink.h | 5 +++++
6 files changed, 43 insertions(+), 20 deletions(-)
diff --git a/examples/pipeline/cli.c b/examples/pipeline/cli.c
index 1ba9b8c52c..c98d137768 100644
--- a/examples/pipeline/cli.c
+++ b/examples/pipeline/cli.c
@@ -555,7 +555,7 @@ static const char cmd_pipeline_port_in_help[] =
"pipeline <pipeline_name> port in <port_id>\n"
" link <link_name> rxq <queue_id> bsz <burst_size>\n"
" ring <ring_name> bsz <burst_size>\n"
-" | source <mempool_name> <file_name>\n"
+" | source <mempool_name> <file_name> loop <n_loops>\n"
" | tap <tap_name> mempool <mempool_name> mtu <mtu> bsz <burst_size>\n";
static void
@@ -682,7 +682,7 @@ cmd_pipeline_port_in(char **tokens,
struct rte_swx_port_source_params params;
struct mempool *mp;
- if (n_tokens < t0 + 3) {
+ if (n_tokens < t0 + 5) {
snprintf(out, out_size, MSG_ARG_MISMATCH,
"pipeline port in source");
return;
@@ -698,7 +698,18 @@ cmd_pipeline_port_in(char **tokens,
params.file_name = tokens[t0 + 2];
- t0 += 3;
+ if (strcmp(tokens[t0 + 3], "loop") != 0) {
+ snprintf(out, out_size, MSG_ARG_NOT_FOUND, "loop");
+ return;
+ }
+
+ if (parser_read_uint64(¶ms.n_loops, tokens[t0 + 4])) {
+ snprintf(out, out_size, MSG_ARG_INVALID,
+ "n_loops");
+ return;
+ }
+
+ t0 += 5;
status = rte_swx_pipeline_port_in_config(p->p,
port_id,
diff --git a/examples/pipeline/examples/l2fwd_macswp_pcap.cli
b/examples/pipeline/examples/l2fwd_macswp_pcap.cli
index 043379cdd6..e9656fe3c2 100644
--- a/examples/pipeline/examples/l2fwd_macswp_pcap.cli
+++ b/examples/pipeline/examples/l2fwd_macswp_pcap.cli
@@ -5,16 +5,16 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
pipeline PIPELINE0 create 0
-pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 0 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 1 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 2 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 3 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
pipeline PIPELINE0 port out 0 sink none
pipeline PIPELINE0 port out 1 sink none
pipeline PIPELINE0 port out 2 sink none
pipeline PIPELINE0 port out 3 sink none
-pipeline PIPELINE0 build ./examples/l2fwd_macswp.spec
+pipeline PIPELINE0 build ./examples/pipeline/examples/l2fwd_macswp.spec
thread 1 pipeline PIPELINE0 enable
diff --git a/examples/pipeline/examples/l2fwd_pcap.cli
b/examples/pipeline/examples/l2fwd_pcap.cli
index 0cf5e32faa..23fcb199f1 100644
--- a/examples/pipeline/examples/l2fwd_pcap.cli
+++ b/examples/pipeline/examples/l2fwd_pcap.cli
@@ -5,16 +5,16 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
pipeline PIPELINE0 create 0
-pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 0 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 1 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 2 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 3 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
pipeline PIPELINE0 port out 0 sink none
pipeline PIPELINE0 port out 1 sink none
pipeline PIPELINE0 port out 2 sink none
pipeline PIPELINE0 port out 3 sink none
-pipeline PIPELINE0 build ./examples/l2fwd.spec
+pipeline PIPELINE0 build ./examples/pipeline/examples/l2fwd.spec
thread 1 pipeline PIPELINE0 enable
diff --git a/examples/pipeline/examples/vxlan_pcap.cli
b/examples/pipeline/examples/vxlan_pcap.cli
index 3cc9a94afe..c03dc9303d 100644
--- a/examples/pipeline/examples/vxlan_pcap.cli
+++ b/examples/pipeline/examples/vxlan_pcap.cli
@@ -5,10 +5,10 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
pipeline PIPELINE0 create 0
-pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
-pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 0 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 1 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 2 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
+pipeline PIPELINE0 port in 3 source MEMPOOL0
./examples/pipeline/examples/packet.pcap loop 1
pipeline PIPELINE0 port out 0 sink none
pipeline PIPELINE0 port out 1 sink none
@@ -16,8 +16,8 @@ pipeline PIPELINE0 port out 2 sink none
pipeline PIPELINE0 port out 3 sink none
pipeline PIPELINE0 port out 4 sink none
-pipeline PIPELINE0 build ./examples/vxlan.spec
-pipeline PIPELINE0 table vxlan_table add ./examples/vxlan_table.txt
+pipeline PIPELINE0 build ./examples/pipeline/examples/vxlan.spec
+pipeline PIPELINE0 table vxlan_table add
./examples/pipeline/examples/vxlan_table.txt
pipeline PIPELINE0 commit
thread 1 pipeline PIPELINE0 enable
diff --git a/lib/port/rte_swx_port_source_sink.c
b/lib/port/rte_swx_port_source_sink.c
index 4180cba1c5..93c346cfb1 100644
--- a/lib/port/rte_swx_port_source_sink.c
+++ b/lib/port/rte_swx_port_source_sink.c
@@ -39,6 +39,7 @@ do {
\
struct source {
struct {
struct rte_mempool *pool;
+ uint64_t n_loops;
} params;
struct rte_swx_port_in_stats stats;
struct rte_mbuf **pkts;
@@ -96,6 +97,8 @@ source_create(void *args)
/* Initialization. */
p->params.pool = params->pool;
+ p->params.n_loops = params->n_loops ? params->n_loops : UINT64_MAX;
+
/* PCAP file. */
for (i = 0; i < n_pkts_max; i++) {
struct pcap_pkthdr pcap_pkthdr;
@@ -142,6 +145,8 @@ source_pkt_rx(void *port, struct rte_swx_pkt *pkt)
struct rte_mbuf *m_dst, *m_src;
uint8_t *m_dst_data, *m_src_data;
+ if (!p->params.n_loops)
+ return 0;
/* m_src identification. */
m_src = p->pkts[p->pos];
m_src_data = rte_pktmbuf_mtod(m_src, uint8_t *);
@@ -177,8 +182,10 @@ source_pkt_rx(void *port, struct rte_swx_pkt *pkt)
/* m_src next. */
p->pos++;
- if (p->pos == p->n_pkts)
+ if (p->pos == p->n_pkts) {
p->pos = 0;
+ p->params.n_loops--;
+ }
return 1;
}
diff --git a/lib/port/rte_swx_port_source_sink.h
b/lib/port/rte_swx_port_source_sink.h
index 88a890c5a5..7b2cb2c759 100644
--- a/lib/port/rte_swx_port_source_sink.h
+++ b/lib/port/rte_swx_port_source_sink.h
@@ -28,6 +28,11 @@ struct rte_swx_port_source_params {
/** Name of a valid PCAP file to read the input packets from. */
const char *file_name;
+ /** Number of times to loop through the input PCAP file. Loop
+ * infinite times when set to 0.
+ */
+ uint64_t n_loops;
+
/** Maximum number of packets to read from the PCAP file. When 0, it is
* internally set to RTE_SWX_PORT_SOURCE_PKTS_MAX. Once read from the
* PCAP file, the same packets are looped forever.
--
2.25.1
