Hi Radu,
> -----Original Message-----
> From: dev <dev-boun...@dpdk.org> On Behalf Of Radu Nicolau
> Sent: Friday, August 13, 2021 10:30 AM
> To: Ananyev, Konstantin <konstantin.anan...@intel.com>; Iremonger,
> Bernard <bernard.iremon...@intel.com>; Medvedkin, Vladimir
> <vladimir.medved...@intel.com>
> Cc: dev@dpdk.org; m...@ashroe.eu; Richardson, Bruce
> <bruce.richard...@intel.com>; hemant.agra...@nxp.com;
> gak...@marvell.com; ano...@marvell.com; Doherty, Declan
> <declan.dohe...@intel.com>; Sinha, Abhijit <abhijit.si...@intel.com>;
> Buckley, Daniel M <daniel.m.buck...@intel.com>; march...@marvell.com;
> ktejas...@marvell.com; ma...@nvidia.com; Nicolau, Radu
> <radu.nico...@intel.com>
> Subject: [dpdk-dev] [PATCH v3 05/10] ipsec: add support for AEAD algorithms
>
> Add support for AES_CCM, CHACHA20_POLY1305 and AES_GMAC.
>
> Signed-off-by: Declan Doherty <declan.dohe...@intel.com>
> Signed-off-by: Radu Nicolau <radu.nico...@intel.com>
> Signed-off-by: Abhijit Sinha <abhijit.si...@intel.com>
> Signed-off-by: Daniel Martin Buckley <daniel.m.buck...@intel.com>
> ---
> +
> +/*
> + * RFC 4106, 5 AAD Construction
> + * spi and sqn should already be converted into network byte order.
[Fan: Comments is incorrect, should be RFC7643]
> + * Make sure that not used bytes are zeroed.
> + */
> +static inline void
> +aead_chacha20_poly1305_aad_fill(struct aead_chacha20_poly1305_aad
> *aad,
> + rte_be32_t spi, rte_be64_t sqn,
> + int esn)
> +{
> + aad->spi = spi;
> + if (esn)
> + aad->sqn.u64 = sqn;
> + else {
> + aad->sqn.u32[0] = sqn_low32(sqn);
> + aad->sqn.u32[1] = 0;
> + }
> + aad->align0 = 0;
> +}
> +
> /*
