On Tue, Aug 3, 2021 at 4:20 AM David Christensen <d...@linux.vnet.ibm.com>
wrote:
>
>
>
> On 7/30/21 1:49 AM, jer...@marvell.com wrote:
> > From: Jerin Jacob <jer...@marvell.com>
> >
> > Dump the arm64 arch state register in oops
> > handling routine.
> >
> > Signed-off-by: Jerin Jacob <jer...@marvell.com>
> > ---
> > lib/eal/unix/eal_oops.c | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/lib/eal/unix/eal_oops.c b/lib/eal/unix/eal_oops.c
> > index da71481ade..7469610d96 100644
> > --- a/lib/eal/unix/eal_oops.c
> > +++ b/lib/eal/unix/eal_oops.c
> > @@ -162,6 +162,25 @@ archinfo_dump(ucontext_t *uc)
> > stack_code_dump((void *)mc->gregs[REG_RSP], (void
> > *)mc->gregs[REG_RIP]);
> > }
> >
> > +#elif defined(RTE_ARCH_ARM64) && defined(RTE_EXEC_ENV_LINUX)
> > +
> > +static void
> > +archinfo_dump(ucontext_t *uc)
> > +{
> > + mcontext_t *mc = &uc->uc_mcontext;
> > + int i;
> > +
> > + oops_print("PC : 0x%.16llx", mc->pc);
> > + oops_print("SP : 0x%.16llx\n", mc->sp);
> > + for (i = 0; i < 31; i++)
> ~~~
> Maybe <= instead of < ?? 31 is a strange number of registers and the
> line feed doesn't seem to line things up for PSTATEn below.
Based on spec
https://elixir.bootlin.com/linux/v4.5/source/arch/arm64/include/uapi/asm/sigcontext.h
it is 0 from 30 as r31 is SP, it is already part as struct sigcontext::sp.
>
> > + oops_print("X%.2d: 0x%.16llx%s", i, mc->regs[i],
> > + i & 0x1 ? "\n" : " ");
>
> Dave
