> -----Original Message-----
> From: dev <dev-boun...@dpdk.org> On Behalf Of Thomas Monjalon
> Sent: Sunday, August 8, 2021 8:52 PM
> To: dev@dpdk.org
> Cc: bruce.richard...@intel.com; david.march...@redhat.com; Matan Azrad
> <ma...@nvidia.com>; Viacheslav Ovsiienko <viachesl...@nvidia.com>
> Subject: [dpdk-dev] [PATCH v3 3/5] vdpa/mlx5: fix minsize build
> 
> Error occurs when configuring meson with --buildtype=minsize with GCC
> 11.1.0:
> 
> drivers/vdpa/mlx5/mlx5_vdpa_mem.c: In function
> ‘mlx5_vdpa_mem_register’:
> drivers/vdpa/mlx5/mlx5_vdpa_mem.c:183:24: error:
> initialization of ‘uint64_t’ {aka ‘long unsigned int’} from ‘void *’
> makes integer from pointer without a cast [-Werror=int-conversion]
> |         uint64_t gcd = NULL;
> |                        ^~~~
> drivers/vdpa/mlx5/mlx5_vdpa_mem.c:244:75: error:
> ‘mode’ may be used uninitialized in this function [-Werror=maybe-
> uninitialized]
> |                         klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
> |                                    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> |                               KLM_SIZE_MAX_ALIGN(empty_region_sz) : gcd;
> |
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~
> 
> Signed-off-by: Thomas Monjalon <tho...@monjalon.net>
> ---
>  drivers/vdpa/mlx5/mlx5_vdpa_mem.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
> b/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
> index a13bde5a0b..59ce4e891c 100644
> --- a/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
> +++ b/drivers/vdpa/mlx5/mlx5_vdpa_mem.c
> @@ -177,10 +177,10 @@ mlx5_vdpa_mem_register(struct mlx5_vdpa_priv
> *priv)
>       struct mlx5_devx_mkey_attr mkey_attr;
>       struct mlx5_vdpa_query_mr *entry = NULL;
>       struct rte_vhost_mem_region *reg = NULL;
> -     uint8_t mode;
> +     uint8_t mode = 0;
>       uint32_t entries_num = 0;
>       uint32_t i;
> -     uint64_t gcd;
> +     uint64_t gcd = 0;
>       uint64_t klm_size;
>       uint64_t mem_size;
>       uint64_t k;
> --
> 2.31.1
Reviewed-by: Ruifeng Wang <ruifeng.w...@arm.com>

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