On Tue, Jun 15, 2021 at 12:54 AM <pbhagavat...@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavat...@marvell.com>
>
> Shift is used to generate an 8-bit saturate value from the current
> aura used count. The shift value should be derived from the log2 of
> block count if it is greater than 256 else the shift should be 0.
>
> Fixes: 7bcc47cbe2fa ("mempool/octeontx2: add mempool alloc op")Cc: sta...@dpdk.og > > Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com> Series applied to dpdk-next-net-eventdev/for-main. Thanks > --- > drivers/mempool/octeontx2/otx2_mempool_ops.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/mempool/octeontx2/otx2_mempool_ops.c > b/drivers/mempool/octeontx2/otx2_mempool_ops.c > index 9ff71bcf6b..d827fd8c7b 100644 > --- a/drivers/mempool/octeontx2/otx2_mempool_ops.c > +++ b/drivers/mempool/octeontx2/otx2_mempool_ops.c > @@ -611,7 +611,8 @@ npa_lf_aura_pool_pair_alloc(struct otx2_npa_lf *lf, const > uint32_t block_size, > /* Update aura fields */ > aura->pool_addr = pool_id;/* AF will translate to associated poolctx > */ > aura->ena = 1; > - aura->shift = __builtin_clz(block_count) - 8; > + aura->shift = rte_log2_u32(block_count); > + aura->shift = aura->shift < 8 ? 0 : aura->shift - 8; > aura->limit = block_count; > aura->pool_caching = 1; > aura->err_int_ena = BIT(NPA_AURA_ERR_INT_AURA_ADD_OVER); > @@ -626,7 +627,8 @@ npa_lf_aura_pool_pair_alloc(struct otx2_npa_lf *lf, const > uint32_t block_size, > pool->ena = 1; > pool->buf_size = block_size / OTX2_ALIGN; > pool->stack_max_pages = stack_size; > - pool->shift = __builtin_clz(block_count) - 8; > + pool->shift = rte_log2_u32(block_count); > + pool->shift = pool->shift < 8 ? 0 : pool->shift - 8; > pool->ptr_start = 0; > pool->ptr_end = ~0; > pool->stack_caching = 1; > -- > 2.17.1 >
