On 6/15/21 4:34 AM, Min Hu (Connor) wrote:
> From: Chengwen Feng <fengcheng...@huawei.com>
>
> Kunpeng 930 support Tx push mode which could improve performance, It
> works like below:
> 1. Add PCIe bar45 which support driver direct write the Tx descriptor
> or tail reg to it.
> 2. Support three operations: a) direct write one Tx descriptor, b)
> direct write two Tx descriptors, c) direct write tail reg.
> 3. The original tail reg located at bar23, the above bar45 tail reg
> could provide better bandwidth from the hardware perspective.
>
> The hns3 driver only support direct write tail reg (also have the name
> of quick doorbell), the detail:
> Considering compatibility, firmware will report Tx push capa if the
> hardware support it.
>
> Signed-off-by: Chengwen Feng <fengcheng...@huawei.com>
> Signed-off-by: Min Hu (Connor) <humi...@huawei.com>
With description mangled a bit and few minor fixes
described below.
Applied, thanks.
[snip]
> diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
> index 1d7a769..1fb16cd 100644
> --- a/drivers/net/hns3/hns3_rxtx.c
> +++ b/drivers/net/hns3/hns3_rxtx.c
> @@ -2892,6 +2892,69 @@ hns3_tx_queue_conf_check(struct hns3_hw *hw, const
> struct rte_eth_txconf *conf,
> return 0;
> }
>
> +static void *
> +hns3_tx_push_get_queue_tail_reg(struct rte_eth_dev *dev, uint16_t queue_id)
> +{
> +#define HNS3_TX_PUSH_TQP_REGION_SIZE 0x10000
> +#define HNS3_TX_PUSH_QUICK_DOORBELL_OFFSET 64
> +#define HNS3_TX_PUSH_PCI_BAR_INDEX 4
> +
> + struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
> + uint8_t bar_id = HNS3_TX_PUSH_PCI_BAR_INDEX;
> +
> + /*
> + * If device support Tx push then its PCIe bar45 must exist, and DPDK
> + * framework will mmap the bar45 default in pci probe stage.
pci -> PCI
> + *
> + * In the bar45, the first half is for roce(RDMA over Converged
roce -> RoCE
> + * Ethernet), and the second half is for NIC, every TQP occupy 64KB.
> + *
> + * The quick doorbell located at 64B offset in the TQP region.
> + */
> + return (void *)((char *)pci_dev->mem_resource[bar_id].addr +
> + (pci_dev->mem_resource[bar_id].len >> 1) +
> + HNS3_TX_PUSH_TQP_REGION_SIZE * queue_id +
> + HNS3_TX_PUSH_QUICK_DOORBELL_OFFSET);
Remove unnecessary type cast to 'void *'.
[snip]
