Below is NVIDIA Mellanox's roadmap for DPDK21.08, on which we are currently 
working:



rte_flow new APIs:

===============

[1] Extend rte_ipv4_hdr with ihl field separated from version field(while 
persevering the original API)

              Motivation: to allow efficient implementation of match on ihl 
field in ipv4. Please note that the combination field of version and Ihl is 
maintained.



mlx5 PMD updates:

==================

mlx5 PMD will support the rte_flow update changes listed above and below



[2]Add non-default mode of rejecting duplicating flow rules

              Motivation: some at-scale applications may not keep a copy of all 
the inserted rules. At the same time they wish to avoid duplicated rules in the 
HW. For that we are adding support for non-default rejection of duplicated 
rule. When application wants to get an error message for duplicated rule a 
specific new devargs would needed to be used.



[3] extend meter implantation

              Motivation:

  1.  currently each flow can execute one meter action. Some applications 
requires a connection(as manifested as rte rule) to be metered according to 
more than one meter. We are enhancing the meter implementation in our PMD to 
allow multiple meters to be cascaded to construct meter hierarchy so packet can 
be accounted for by several meters w/o using multiple flows and jump actions 
between them.
  2.  At the time we are extending the implementation to allow a single meter 
action to be shared by rte rules inserted with different ports.
  3.  We are enhancing the steering mechanism for meter to allow actions to be 
trigged by yellow color(the same actions allowed by green and red colors)



[4] Extend flow dump output to include further information about the flows

              Motivation: current implementation of flow dump is very limited 
in its content. We are adding further information as part of the flow dump  - 
counter and their metric(hits, bytes, id), modify_header(action type), 
encap/decap(index number)



[5] improved rule insertion performance

              Motivation: in order to support at scale insertion of rules we 
are improving several aspects of the MLX5 PMD. Most noticeable are improvement 
in the memory allocation, set tag and mark actions.



[6] Introduce Scalable Function(SF) support

              Motivation: we are introducing a new function called SF. As VFs 
resources are limited and dependent on the PCI bus we are adding SF with the 
same functionality but with fewer limitations. SFs share PCI resources with 
other SFs and/or with it parent PCI function but it's not a PCI device. In this 
released we are introducing SF support for  net, regex, compress and vdpa 
classes. To support SFs we are also introducing auxiliary bus as the foundation 
for SFs.



[7] Extend vxlan header matching to include last 8 bits

              Motivation: in order to provide the ability to match in steering 
rules on vxlan alert bit, we are extending the vxlan matching to support the 
last 8 bits of the header.



New PMDs:

==============

[8] Implement look aside AES-XTS encryption/decryption  PMD over Bluefield-2 
smartNic  and connect6-DX to support existing rte_cryptodev and rte_crypto APIs



testpmd updates:

================

 testpmd updated to support the changes listed above



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