<snip> > >> > >> >05/05/2021 14:14, pbhagavat...@marvell.com: > >> >> From: Pavan Nikhilesh <pbhagavat...@marvell.com> > >> >> > >> >> The ARM architecture allows SoCs to have extensions in addition to > >> >> base profiles such as Large System Extension (LSE), CRC etc. > >> >> > >> >> Add ability to declare SoC specific extensions. > >> >> > >> >> Signed-off-by: Pavan Nikhilesh <pbhagavat...@marvell.com> > >> > > >> >I don't know what it is fixing. It is an optimization? > >> >Is it candidate for next release? > >> > >> Its more of an enhancement, the default n2 march flag doesn't > >describe > >> anything about the extensions that a specific SoC has. > >> In case of OCTEON 10 SoC it has support for LSE and CRC in additional > >to the > >> basic n2 profile. > >> This patch allows SoC to add extensions to the -march flag. > >> Default n2 march : -march=armv8.5-a+crypto+sve2 > >> OCTEON 10 march : -march=armv8.5-a+crypto+sve2+lse+crc > >> > >> Including extensions in march helps compiler generate better code. > >> Example adding '+lse' tells the compiler to inline C11 atomics rather > >than > >> having a run time jump > >> > >> https://urldefense.proofpoint.com/v2/url?u=https- > >3A__gcc.godbolt.org_z_8hPv87dbr&d=DwIFAg&c=nKjWec2b6R0mOyPa > >z7xtfQ&r=1cjuAHrGh745jHNmj2fD85sUMIJ2IPIDsIJzo6FN6Z0&m=Us6Ig > >UW0QYnSuSc8dYw0yLXgzYvGHoBD8AKNLX0bzhw&s=mk9V9_YgFBdO23 > >6JpZBIN_yhCkYAXGcE_1X315c7jGk&e= > >Can you compile the code with armv8.5-a instead of armv8-a? I see that > >LSE instructions are used. > > Is LSE extension made mandatory from v8.1? I couldn't find a relevant > documentation on ARM website. Yes, LSE is mandatory in v8.1. You can refer to Arm-ARM document.
> > I have seen some compilers not in lining unless 'lse' is mentioned in march. If march provided is >= v8.1 the compiler should generate the LSE instructions. > > The patch still holds true for CRC though as it is listed separately below > https://developer.arm.com/architectures/cpu-architecture/a- > profile/exploration-tools/feature-names-for-a-profile > > Also, looks like sve2 support in n2 core might be optional as per above doc? I need to check on this. Some of the info here might not be public yet. > > >https://urldefense.proofpoint.com/v2/url?u=https- > >3A__gcc.godbolt.org_z_18MYhY7xv&d=DwIFAg&c=nKjWec2b6R0mOyP > >az7xtfQ&r=1cjuAHrGh745jHNmj2fD85sUMIJ2IPIDsIJzo6FN6Z0&m=Us6I > >gUW0QYnSuSc8dYw0yLXgzYvGHoBD8AKNLX0bzhw&s=IpCFzI_hPuBl0P6 > >Ylbrfm-1WXvdGg9mwnuzpwC6PrCM&e= > > > >> > >> I don't think this is limited to OCTEON 10 other SoC should also add > >their > >> extensions to march. > >> > >> > > >> >> --- > >> >> > >> >> More details about ARM extensions > >> >> https://urldefense.proofpoint.com/v2/url?u=https- > >> > >>3A__developer.arm.com_documentation_102378_0200&d=DwICAg& > >c > >> > >>=nKjWec2b6R0mOyPaz7xtfQ&r=1cjuAHrGh745jHNmj2fD85sUMIJ2IPID > >s > >> > >>IJzo6FN6Z0&m=yCt4te5_7VJvaJT5OXrOpFXH3UBOUqRDlHZuSVEUZH > >M > >> >&s=DquFBMwxMpjxWcM2Qw1c2t_ak-j6DN4rz8ce_I43RJk&e= > >> >> > >> >> config/arm/meson.build | 8 ++++++++ > >> >> 1 file changed, 8 insertions(+) > >> >> > >> >> diff --git a/config/arm/meson.build b/config/arm/meson.build > >index > >> >> 22cd81319..8aa961e5b 100644 > >> >> --- a/config/arm/meson.build > >> >> +++ b/config/arm/meson.build > >> >> @@ -230,6 +230,7 @@ soc_cn10k = { > >> >> ['RTE_MAX_LCORE', 24], > >> >> ['RTE_MAX_NUMA_NODES', 1] > >> >> ], > >> >> + 'extensions' : ['lse', 'crc'], > >> >> 'part_number': '0xd49', > >> >> 'numa': false > >> >> } > >> >> @@ -387,6 +388,7 @@ else > >> >> endif > >> >> > >> >> soc_flags = [] > >> >> + soc_extensions = [] > >> >> if soc_config.has_key('not_supported') > >> >> error('SoC @0@ not supported.'.format(soc)) > >> >> elif soc_config != {} > >> >> @@ -394,6 +396,7 @@ else > >> >> implementer_config = implementers[implementer_id] > >> >> part_number = soc_config['part_number'] > >> >> soc_flags = soc_config.get('flags', []) > >> >> + soc_extensions = soc_config.get('extensions', []) > >> >> if not soc_config.get('numa', true) > >> >> has_libnuma = 0 > >> >> endif > >> >> @@ -431,6 +434,11 @@ else > >> >> # apply supported machine args > >> >> machine_args = [] # Clear previous machine args > >> >> foreach flag: part_number_config['machine_args'] > >> >> + if flag.startswith('-march') and soc_extensions.length() > >> >> + != > >> >> + 0 > >> > > >> >Why condition on start with -march? > >> > >> There are some implementer flags which don't have -march to add > >extensions > >> to. > >> > >> > > >> >> + foreach ex: soc_extensions > >> >> + flag += '+' + ex > >> >> + endforeach > >> >> + endif > >> > > >> >
