From: Dekel Peled <dek...@nvidia.com>
Update the PRM structure and HCA capabilities reading, to include
relevant capabilities for AES-XTS crypto.
Signed-off-by: Dekel Peled <dek...@nvidia.com>
Acked-by: Matan Azrad <ma...@nvidia.com>
---
drivers/common/mlx5/mlx5_devx_cmds.c | 3 +++
drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++
drivers/common/mlx5/mlx5_prm.h | 5 ++++-
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index a0bf0d3009..7ca767944e 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -771,6 +771,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
MLX5_GET(cmd_hca_cap, hcattr, umr_indirect_mkey_disabled);
attr->umr_modify_entity_size_disabled =
MLX5_GET(cmd_hca_cap, hcattr, umr_modify_entity_size_disabled);
+ attr->crypto = MLX5_GET(cmd_hca_cap, hcattr, crypto);
+ if (attr->crypto)
+ attr->aes_xts = MLX5_GET(cmd_hca_cap, hcattr, aes_xts);
if (attr->qos.sup) {
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
b/drivers/common/mlx5/mlx5_devx_cmds.h
index 870bdb6b30..28ade5bbc4 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -137,6 +137,8 @@ struct mlx5_hca_attr {
uint32_t qp_ts_format:2;
uint32_t regex:1;
uint32_t reg_c_preserve:1;
+ uint32_t crypto:1; /* Crypto engine is supported. */
+ uint32_t aes_xts:1; /* AES-XTS crypto is supported. */
uint32_t regexp_num_of_engines;
uint32_t log_max_ft_sampler_num:8;
uint32_t geneve_tlv_opt;
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 2e5e42f6e9..a8fbfbb0f5 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1427,7 +1427,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 sq_ts_format[0x2];
u8 rq_ts_format[0x2];
u8 reserved_at_444[0x1C];
- u8 reserved_at_460[0x10];
+ u8 reserved_at_460[0x8];
+ u8 aes_xts[0x1];
+ u8 crypto[0x1];
+ u8 reserved_at_46a[0x6];
u8 max_num_eqs[0x10];
u8 reserved_at_480[0x3];
u8 log_max_l2_table[0x5];
--
2.25.1
