On Wed, Mar 31, 2021 at 1:07 AM Timothy McDaniel
<timothy.mcdan...@intel.com> wrote:
>
> This commit adds support for DLB v2.5 probe-time hardware init,
> and sets up a framework for incorporating the remaining
> changes required to support DLB v2.5.
>
> DLB v2.0 and DLB v2.5 are similar in many respects, but their
> register offsets and definitions are different. As a result of these,
> differences, the low level hardware functions must take the device
> version into consideration. This requires that the hardware version be
> passed to many of the low level functions, so that the PMD can
> take the appropriate action based on the device version.
>
> To ease the transition and keep the individual patches small, three
> temporary files are added in this commit. These files have "new"
> in their names. The files with "new" contain changes specific to a
> consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
> files of the same name (minus "new") contain the old DLB v2.0 specific
> code. The intent is to remove code from the original files as that code
> is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
> files in a series of commits. At end of the patch series, the old files
> will be empty and the "new" files will have the logic needed
> to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
> At that time, the original DLB v2.0 specific files will be deleted,
> and the "new" files will be renamed and replace them.
>
> Signed-off-by: Timothy McDaniel <timothy.mcdan...@intel.com>
> ---
> drivers/event/dlb2/dlb2_priv.h | 5 +
> drivers/event/dlb2/meson.build | 1 +
> .../event/dlb2/pf/base/dlb2_hw_types_new.h | 362 ++
> drivers/event/dlb2/pf/base/dlb2_osdep.h | 4 +
> drivers/event/dlb2/pf/base/dlb2_regs_new.h | 4412 +++++++++++++++++
> drivers/event/dlb2/pf/base/dlb2_resource.c | 180 +-
> drivers/event/dlb2/pf/base/dlb2_resource.h | 36 -
> .../event/dlb2/pf/base/dlb2_resource_new.c | 259 +
> .../event/dlb2/pf/base/dlb2_resource_new.h | 73 +
> drivers/event/dlb2/pf/dlb2_main.c | 41 +-
> drivers/event/dlb2/pf/dlb2_main.h | 4 +
> drivers/event/dlb2/pf/dlb2_pf.c | 6 +-
> 12 files changed, 5153 insertions(+), 230 deletions(-)
> create mode 100644 drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
> create mode 100644 drivers/event/dlb2/pf/base/dlb2_regs_new.h
> create mode 100644 drivers/event/dlb2/pf/base/dlb2_resource_new.c
> create mode 100644 drivers/event/dlb2/pf/base/dlb2_resource_new.h
>
> diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
> index 1cd78ad94..f3a9fe0aa 100644
> --- a/drivers/event/dlb2/dlb2_priv.h
> +++ b/drivers/event/dlb2/dlb2_priv.h
> @@ -114,6 +114,11 @@
> #define EV_TO_DLB2_PRIO(x) ((x) >> 5)
> #define DLB2_TO_EV_PRIO(x) ((x) << 5)
>
> +enum dlb2_hw_ver {
> + DLB2_HW_VER_2,
> + DLB2_HW_VER_2_5,
> +};
> +
> enum dlb2_hw_port_types {
> DLB2_LDB_PORT,
> DLB2_DIR_PORT,
> diff --git a/drivers/event/dlb2/meson.build b/drivers/event/dlb2/meson.build
> index f22638b8e..bded07e06 100644
> --- a/drivers/event/dlb2/meson.build
> +++ b/drivers/event/dlb2/meson.build
> @@ -14,6 +14,7 @@ sources = files('dlb2.c',
> 'pf/dlb2_main.c',
> 'pf/dlb2_pf.c',
> 'pf/base/dlb2_resource.c',
> + 'pf/base/dlb2_resource_new.c',
> 'rte_pmd_dlb2.c',
> 'dlb2_selftest.c'
> )
> diff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
> b/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
> new file mode 100644
> index 000000000..d58aa94ad
> --- /dev/null
> +++ b/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
> @@ -0,0 +1,362 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2016-2020 Intel Corporation
> + */
> +
> +#ifndef __DLB2_HW_TYPES_NEW_H
> +#define __DLB2_HW_TYPES_NEW_H
> +
> +#include "../../dlb2_priv.h"
> +#include "dlb2_user.h"
> +
> +#include "dlb2_osdep_list.h"
> +#include "dlb2_osdep_types.h"
> +#include "dlb2_regs_new.h"
> +
> +#define DLB2_BITS_SET(x, val, mask) (x = ((x) & ~(mask)) \
> + | (((val) << (mask##_LOC)) & (mask)))
> +#define DLB2_BITS_CLR(x, mask) (x &= ~(mask))
> +#define DLB2_BIT_SET(x, mask) ((x) |= (mask))
> +#define DLB2_BITS_GET(x, mask) (((x) & (mask)) >> (mask##_LOC))
> +
> +#define DLB2_MAX_NUM_VDEVS 16
> +#define DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS 2
> +#define DLB2_NUM_ARB_WEIGHTS 8
> +#define DLB2_MAX_NUM_AQED_ENTRIES 2048
> +#define DLB2_MAX_WEIGHT 255
> +#define DLB2_NUM_COS_DOMAINS 4
> +#define DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS 2
> +#define DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES 5
> +#define DLB2_MAX_CQ_COMP_CHECK_LOOPS 409600
> +#define DLB2_MAX_QID_EMPTY_CHECK_LOOPS (32 * 64 * 1024 * (800 / 30))
> +
> +#define DLB2_FUNC_BAR 0
> +#define DLB2_CSR_BAR 2
> +
> +#ifdef FPGA
> +#define DLB2_HZ 2000000
> +#else
> +#define DLB2_HZ 800000000
> +#endif
Removal of compile-time FPGA constant is not addressed.
>From here (See below)
> + (ver == DLB2_HW_V2 ? \
> + DLB2_V2CHP_CFG_LDB_WD_DISABLE1 : \
> + DLB2_V2_5CHP_CFG_LDB_WD_DISABLE1)
> +
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_LIMIT 0x00007FFF
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_V 0x00008000
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RSVD0 0xFFFF0000
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_LIMIT_LOC 0
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_V_LOC 15
> +#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RSVD0_LOC 16
To here(See above). Please move this autogenerated register definition
to a separate patch like "event/dlb2: add HW register definition" or
so
