22/01/2021 18:12, Anatoly Burakov:
> Currently, the API documentation is ambiguous as to what happens when
> certain conditions are met. Document the behavior explicitly, as well as
> fix some typos and outdated comments.
>
> Fixes: 6a17919b0e2a ("eal: change power intrinsics API")
>
> Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
> ---
> * Monitor specific address for changes. This will cause the CPU to enter an
> * architecture-defined optimized power state until either the specified
> * memory address is written to, a certain TSC timestamp is reached, or other
> * reasons cause the CPU to wake up.
> *
> - * Additionally, an `expected` 64-bit value and 64-bit mask are provided. If
> - * mask is non-zero, the current value pointed to by the `p` pointer will be
> - * checked against the expected value, and if they match, the entering of
> - * optimized power state may be aborted.
> + * Additionally, an expected value (`pmc->val`), mask (`pmc->mask`), and data
> + * size (`pmc->size`) are provided in the `pmc` power monitoring condition.
> If
> + * the mask is non-zero, the current value pointed to by the `pmc->addr`
> pointer
> + * will be read and compared against the expected value, and if they match,
> the
> + * entering of optimized power state will be aborted. This is intended to
> + * prevent the CPU from entering optimized power state and waiting on a write
> + * that has already happened by the time this API is called.
I think that's a lot better. Thank you.
Acked-by: Thomas Monjalon <tho...@monjalon.net>
