On 1/27/2021 3:34 PM, 谢华伟(此时此刻） wrote:
On 2021/1/27 18:40, Ferruh Yigit wrote:
On 10/22/2020 4:51 PM, 谢华伟(此时此刻） wrote:
From: "huawei.xhw" <huawei....@alibaba-inc.com>
If IO BAR, we get PIO address.
If MMIO BAR, we get mapped virtual address.
We distinguish PIO and MMIO by their address like how kernel does.
ioread/write8/16/32 is provided to access PIO/MMIO.
BTW, for virtio on arch other than x86, BAR flag indicates PIO but is mapped.
Signed-off-by: huawei.xhw <huawei....@alibaba-inc.com>
<...>
@@ -408,15 +403,30 @@
&end_addr, &flags) < 0)
goto error;
- if (!(flags & IORESOURCE_IO)) {
- RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not
supported\n", __func__);
+ if (flags & IORESOURCE_IO) {
+ iobar = 1;
+ base = (unsigned long)phys_addr;
+ RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base);
+ } else if (flags & IORESOURCE_MEM) {
+ iobar = 0;
+ base = (unsigned long)dev->mem_resource[bar].addr;
Hi Huawei,
At this stage, to have a valid 'addr' it should be already mmap'ed, can you
please provide the call stack when it is set/mmaped, to confirm it will be
always valid at this point?
Thanks,
ferruh
#0 pci_uio_map_resource_by_index (dev=0x420c700, res_idx=0,
uio_res=0x1003b19c0, map_idx=0) at ../drivers/bus/pci/linux/pci_uio.c:286
#1 0x000000000095f047 in pci_uio_map_resource (dev=0x420c700) at
../drivers/bus/pci/pci_common_uio.c:112
#2 0x000000000095f645 in rte_pci_map_device (dev=0x420c700) at
../drivers/bus/pci/linux/pci.c:81
#3 0x000000000174b5b9 in virtio_read_caps (dev=0x420c700, hw=0x1003b2d80) at
../drivers/net/virtio/virtio_pci.c:574
#4 0x000000000174baf9 in vtpci_init (dev=0x420c700, hw=0x1003b2d80) at
../drivers/net/virtio/virtio_pci.c:697
#5 0x0000000001743c84 in eth_virtio_dev_init (eth_dev=0x3461e40
<rte_eth_devices>) at ../drivers/net/virtio/virtio_ethdev.c:1954
Thanks. This looks good.
