Hi, Wenjun
> -----Original Message-----
> From: Wu, Wenjun1 <wenjun1...@intel.com>
> Sent: Tuesday, January 19, 2021 2:59 PM
> To: dev@dpdk.org; Guo, Jia <jia....@intel.com>; Zhang, Qi Z
> <qi.z.zh...@intel.com>; Zhang, Yuying <yuying.zh...@intel.com>
> Cc: Wu, Wenjun1 <wenjun1...@intel.com>; sta...@dpdk.org
> Subject: [PATCH v1] net/e1000: fix the invalid flow control mode setting
>
> E1000_CTRL register should be updated according to fc_conf->mode's value.
>
> Fixes: af75078fece3 ("first public release")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Wenjun Wu <wenjun1...@intel.com>
> ---
> drivers/net/e1000/igb_ethdev.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/e1000/igb_ethdev.c
> b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..390737393 100644
> --- a/drivers/net/e1000/igb_ethdev.c
> +++ b/drivers/net/e1000/igb_ethdev.c
> @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev,
> struct rte_eth_fc_conf *fc_conf)
> uint32_t rx_buf_size;
> uint32_t max_high_water;
> uint32_t rctl;
> + uint32_t ctrl;
>
> hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> if (fc_conf->autoneg != hw->mac.autoneg) @@ -3101,6 +3102,15
> @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf
> *fc_conf)
> rctl &= ~E1000_RCTL_PMCF;
>
> E1000_WRITE_REG(hw, E1000_RCTL, rctl);
> +
Some document for ctrl, like rctl setting, would be appreciate.
> + ctrl = E1000_READ_REG(hw, E1000_CTRL);
> + ctrl &= ~(E1000_CTRL_RFCE|E1000_CTRL_TFCE);
> + if (fc_conf->mode == RTE_FC_RX_PAUSE || fc_conf->mode
> == RTE_FC_FULL)
> + ctrl |= E1000_CTRL_RFCE;
> + if (fc_conf->mode == RTE_FC_TX_PAUSE || fc_conf->mode
> == RTE_FC_FULL)
> + ctrl |= E1000_CTRL_TFCE;
What about the case if fc_conf->mode == RTE_FC_NONE? Use a switch would be help
for that?
> + E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
> +
> E1000_WRITE_FLUSH(hw);
>
> return 0;
> --
> 2.25.1
