> On Dec 23, 2020, at 6:47 AM, Juraj Linkeš <juraj.lin...@pantheon.tech> wrote:
>
> Change formatting so that it's more consistent and readable, add/modify
> comments/stdout messages, move configuration options to more appropriate
> places and make the order consistent according to these rules:
> 1. First list generic configuration options, then list options that may
> be overwritten. List SoC-specific options last.
> 2. For SoC-specific options, list number of cores before the number of
> NUMA nodes, to make it consistent with config/meson.build.
>
> Signed-off-by: Juraj Linkeš <juraj.lin...@pantheon.tech>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagaraha...@arm.com>
> ---
> config/arm/arm64_armv8_linux_gcc | 12 +--
> config/arm/meson.build | 96 +++++++++++--------
> .../linux_gsg/cross_build_dpdk_for_arm64.rst | 34 +++++++
> 3 files changed, 93 insertions(+), 49 deletions(-)
>
> ...
> @@ -22,69 +23,86 @@ flags_common = [
>
> ['RTE_SCHED_VECTOR', false],
> ['RTE_ARM_USE_WFE', false],
> + ['RTE_ARCH_ARM64', true],
> + ['RTE_CACHE_LINE_SIZE', 128]
> ]
>
> +# implementer specific aarch64 flags, with middle priority
> +# (will overwrite common flags)
> flags_implementer_generic = [
> ['RTE_MACHINE', '"armv8a"'],
> - ['RTE_MAX_LCORE', 256],
> ['RTE_USE_C11_MEM_MODEL', true],
> - ['RTE_CACHE_LINE_SIZE', 128]]
> + ['RTE_CACHE_LINE_SIZE', 128],
> + ['RTE_MAX_LCORE', 256]
> +]
> ...
All of these other instances of [‘RTE_CACHE_LINE_SIZE’, 128] are just repeating
the values from flags_common. Would it be clearer to omit the duplicates?
I can imagine a case where SoC uses 128, overriding implementer value of 64,
overriding default value of 128 - but is that worth worrying about?
-Andrew
