Add initial support for the next operations:
dev_configure
dev_close
dev_infos_get
Signed-off-by: Matan Azrad <ma...@nvidia.com>
---
drivers/compress/mlx5/mlx5_compress.c | 41 ++++++++++++++++++++++++++++++++---
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/compress/mlx5/mlx5_compress.c
b/drivers/compress/mlx5/mlx5_compress.c
index 639dd61..7148798 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -32,20 +32,55 @@ struct mlx5_compress_priv {
uint8_t min_block_size;
/* Minimum huffman block size supported by the device. */
struct ibv_pd *pd;
+ struct rte_compressdev_config dev_config;
};
+#define MLX5_COMPRESS_MAX_QPS 1024
+
TAILQ_HEAD(mlx5_compress_privs, mlx5_compress_priv) mlx5_compress_priv_list =
TAILQ_HEAD_INITIALIZER(mlx5_compress_priv_list);
static pthread_mutex_t priv_list_lock = PTHREAD_MUTEX_INITIALIZER;
int mlx5_compress_logtype;
+const struct rte_compressdev_capabilities mlx5_caps[RTE_COMP_ALGO_LIST_END];
+
+
+static void
+mlx5_compress_dev_info_get(struct rte_compressdev *dev,
+ struct rte_compressdev_info *info)
+{
+ RTE_SET_USED(dev);
+ if (info != NULL) {
+ info->max_nb_queue_pairs = MLX5_COMPRESS_MAX_QPS;
+ info->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
+ info->capabilities = mlx5_caps;
+ }
+}
+
+static int
+mlx5_compress_dev_configure(struct rte_compressdev *dev,
+ struct rte_compressdev_config *config)
+{
+ struct mlx5_compress_priv *priv = dev->data->dev_private;
+
+ priv->dev_config = *config;
+ return 0;
+}
+
+static int
+mlx5_compress_dev_close(struct rte_compressdev *dev)
+{
+ RTE_SET_USED(dev);
+ return 0;
+}
+
static struct rte_compressdev_ops mlx5_compress_ops = {
- .dev_configure = NULL,
+ .dev_configure = mlx5_compress_dev_configure,
.dev_start = NULL,
.dev_stop = NULL,
- .dev_close = NULL,
- .dev_infos_get = NULL,
+ .dev_close = mlx5_compress_dev_close,
+ .dev_infos_get = mlx5_compress_dev_info_get,
.stats_get = NULL,
.stats_reset = NULL,
.queue_pair_setup = NULL,
--
1.8.3.1
