> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zh...@intel.com>
> Sent: Wednesday, December 16, 2020 8:22 AM
> To: Rong, Leyi <leyi.r...@intel.com>
> Cc: Yigit, Ferruh <ferruh.yi...@intel.com>; dev@dpdk.org; Zhang, Qi Z
> <qi.z.zh...@intel.com>; sta...@dpdk.org
> Subject: [PATCH v2] doc: fix some statements for ice vector PMD
>
> 1. Add descriptions for how to select avx512 datapath.
> 2. Add explanation for "P" in ice.ini.
>
> Fixes: 7f85d5ebcfe1 ("net/ice: add AVX512 vector path")
> Fixes: 271cc8c5028a ("doc: update ice features list")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Qi Zhang <qi.z.zh...@intel.com>
> ---
>
> v2:
> fix statement for force-max-simd-bitwidth which is an EAL argument but not
> devarg.
>
> doc/guides/nics/ice.rst | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index
> a0887f129f..2a4439a63a 100644
> --- a/doc/guides/nics/ice.rst
> +++ b/doc/guides/nics/ice.rst
> @@ -211,9 +211,12 @@ are chosen based on 2 conditions.
> - ``CPU``
> On the X86 platform, the driver checks if the CPU supports AVX2.
> If it's supported, AVX2 paths will be chosen. If not, SSE is chosen.
> + If the CPU supports AVX512 and EAL argument
> + ``force-max-simd-bitwidth`` is set to 512, AVX512 paths will be chosen.
>
> - ``Offload features``
> - The supported HW offload features are described in the document
> ice_vec.ini.
> + The supported HW offload features are described in the document
> + ice.ini, A value "P" means the offload feature is not supported by vector
> path.
> If any not supported features are used, ICE vector PMD is disabled and the
> normal paths are chosen.
>
> --
> 2.26.2
Acked-by: Leyi Rong <leyi.r...@intel.com>
Best Regards,
Leyi Rong
