The number of descriptors configured is returned to a user
via the rxq_info_get API. This number is incorrect for MPRQ.
For SPRQ this number matches the number of mbufs allocated.
For MPRQ we have fewer external MPRQ buffers that can hold
multiple packets in strides of this big buffer. Take that
into account and return the number of MPRQ buffers multiplied
by the number of strides in this case.
Fixes: 26f1bae837 ("net/mlx5: add Rx/Tx burst mode info")
Cc: sta...@dpdk.org
Signed-off-by: Alexander Kozyrev <akozy...@nvidia.com>
---
v1: https://patchwork.dpdk.org/patch/83778/
v2: fixed a commit message typo and a coverity issue
drivers/net/mlx5/mlx5_rxtx.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 3aee8d4def..c540849da2 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -556,7 +556,7 @@ mlx5_rxq_info_get(struct rte_eth_dev *dev, uint16_t
rx_queue_id,
if (!rxq)
return;
- qinfo->mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
+ qinfo->mp = mlx5_rxq_mprq_enabled(rxq) ?
rxq->mprq_mp : rxq->mp;
qinfo->conf.rx_thresh.pthresh = 0;
qinfo->conf.rx_thresh.hthresh = 0;
@@ -566,7 +566,9 @@ mlx5_rxq_info_get(struct rte_eth_dev *dev, uint16_t
rx_queue_id,
qinfo->conf.rx_deferred_start = rxq_ctrl ? 0 : 1;
qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads;
qinfo->scattered_rx = dev->data->scattered_rx;
- qinfo->nb_desc = 1 << rxq->elts_n;
+ qinfo->nb_desc = mlx5_rxq_mprq_enabled(rxq) ?
+ (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
+ (1 << rxq->elts_n);
}
/**
--
2.24.1
