On Wed, Oct 21, 2020 at 9:01 AM <psathe...@marvell.com> wrote:
>
> From: Satheesh Paul <psathe...@marvell.com>
>
> Adds support for merging a base steering rule with
> all flow rules created on a VF.
>
> Signed-off-by: Satheesh Paul <psathe...@marvell.com>
Acked-by: Jerin Jacob <jer...@marvell.com>
Applied to dpdk-next-net-mrvl/for-main. Thanks
> ---
> drivers/net/octeontx2/otx2_flow.c | 2 ++
> drivers/net/octeontx2/otx2_flow.h | 1 +
> drivers/net/octeontx2/otx2_flow_utils.c | 19 ++++++++++++++++++-
> 3 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/octeontx2/otx2_flow.c
> b/drivers/net/octeontx2/otx2_flow.c
> index e07cea709..a5900f349 100644
> --- a/drivers/net/octeontx2/otx2_flow.c
> +++ b/drivers/net/octeontx2/otx2_flow.c
> @@ -605,6 +605,8 @@ otx2_flow_create(struct rte_eth_dev *dev,
> goto err_exit;
> }
>
> + parse_state.is_vf = otx2_dev_is_vf(hw);
> +
> rc = flow_program_npc(&parse_state, mbox, &hw->npc_flow);
> if (rc != 0) {
> rte_flow_error_set(error, EIO,
> diff --git a/drivers/net/octeontx2/otx2_flow.h
> b/drivers/net/octeontx2/otx2_flow.h
> index 1f118c408..30a823c8a 100644
> --- a/drivers/net/octeontx2/otx2_flow.h
> +++ b/drivers/net/octeontx2/otx2_flow.h
> @@ -213,6 +213,7 @@ struct otx2_parse_state {
> uint8_t flags[NPC_MAX_LID];
> uint8_t *mcam_data; /* point to flow->mcam_data + key_len */
> uint8_t *mcam_mask; /* point to flow->mcam_mask + key_len */
> + bool is_vf;
> };
>
> struct otx2_flow_item_info {
> diff --git a/drivers/net/octeontx2/otx2_flow_utils.c
> b/drivers/net/octeontx2/otx2_flow_utils.c
> index 6215a542f..9a0a5f9fb 100644
> --- a/drivers/net/octeontx2/otx2_flow_utils.c
> +++ b/drivers/net/octeontx2/otx2_flow_utils.c
> @@ -884,11 +884,13 @@ flow_check_preallocated_entry_cache(struct otx2_mbox
> *mbox,
>
> int
> otx2_flow_mcam_alloc_and_write(struct rte_flow *flow, struct otx2_mbox *mbox,
> - __rte_unused struct otx2_parse_state *pst,
> + struct otx2_parse_state *pst,
> struct otx2_npc_flow_info *flow_info)
> {
> int use_ctr = (flow->ctr_id == NPC_COUNTER_NONE ? 0 : 1);
> + struct npc_mcam_read_base_rule_rsp *base_rule_rsp;
> struct npc_mcam_write_entry_req *req;
> + struct mcam_entry *base_entry;
> struct mbox_msghdr *rsp;
> uint16_t ctr = ~(0);
> int rc, idx;
> @@ -906,6 +908,21 @@ otx2_flow_mcam_alloc_and_write(struct rte_flow *flow,
> struct otx2_mbox *mbox,
> otx2_flow_mcam_free_counter(mbox, ctr);
> return NPC_MCAM_ALLOC_FAILED;
> }
> +
> + if (pst->is_vf) {
> + (void)otx2_mbox_alloc_msg_npc_read_base_steer_rule(mbox);
> + rc = otx2_mbox_process_msg(mbox, (void *)&base_rule_rsp);
> + if (rc) {
> + otx2_err("Failed to fetch VF's base MCAM entry");
> + return rc;
> + }
> + base_entry = &base_rule_rsp->entry_data;
> + for (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {
> + flow->mcam_data[idx] |= base_entry->kw[idx];
> + flow->mcam_mask[idx] |= base_entry->kw_mask[idx];
> + }
> + }
> +
> req = otx2_mbox_alloc_msg_npc_mcam_write_entry(mbox);
> req->set_cntr = use_ctr;
> req->cntr = ctr;
> --
> 2.25.4
>
