On 28/10/2020 12:45, Bruce Richardson wrote:
According to latest DSA spec[1], the work-queue config register size should be based off a value read from the WQ capabilities register. Update driver to read this value and base the start of each WQ config off that value.Fixes: ff06fa2cf3ba ("raw/ioat: probe idxd PCI") Signed-off-by: Bruce Richardson <bruce.richard...@intel.com> [1] https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html --- drivers/raw/ioat/idxd_pci.c | 19 +++++++++++++------ drivers/raw/ioat/ioat_private.h | 4 +++- drivers/raw/ioat/ioat_spec.h | 5 +---- 3 files changed, 17 insertions(+), 11 deletions(-)
Tested-by: Kevin Laatz <kevin.la...@intel.com>
