In order to synchronize the flow steering cache with hardware in DR
mode, the new function is introduced. The function needs to use both
flags of "MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW/HW", or else some actions
and rules may get stuck in the work queue.
And in some old OS release with inbox driver, the enum used in the
function is not introduced yet. To resolve this, a local defined
macro is introduced. Then in Verbs mode, it will still do nothing.
In DV mode, the glue layer will return the unsupport error.
Fixes: 2e303780c17f ("net/mlx5: add flow sync API")
Signed-off-by: Bing Zhao <bi...@nvidia.com>
Acked-by: Ori Kam <or...@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
---
drivers/net/mlx5/mlx5_flow.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 2cf15f0..967bf71 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -8179,6 +8179,13 @@ int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
return err;
}
+#ifndef HAVE_MLX5DV_DR
+#define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
+#else
+#define MLX5_DOMAIN_SYNC_FLOW \
+ (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
+#endif
+
int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
{
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
@@ -8187,7 +8194,7 @@ int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t
domains)
struct rte_flow_attr attr = { .transfer = 0 };
fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
- ret = fops->sync_domain(dev, domains, MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW);
+ ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
if (ret > 0)
ret = -ret;
return ret;
--
1.8.3.1
