Hi Alejandro,
On Mon, Jul 06, 2015 at 16:45:01 +0100, Alejandro Lucero wrote:
> Hi all,
>
> From the kernel VFIO maintainer:
>
> "I suppose in the short term, mmap should not be advertised as available
> on 32bit hosts. Thanks,"
>
> So, as VFIO support for 32bit systems is broken, DPDK should not configure
> VFIO in that case.
>
Thank you very much for the clarification.
>
> If we need to support 4G BARs, our only choice is really to extend the
> vfio region support for a separate file descriptor per region. The only
> devices I'm aware of with 4G BARs are Nvidia Tesla. This is possible,
> but I would expect such devices would be extremely rare on 32bit hosts.
>
Our Chelsio T5 cards can also have 4G bar size. So, it seems this won't work
on 32-bit with current state of kernel vfio driver.
Nevertheless, updating your patch with below diff works fine on 64-bit
for vfio testing on Chelsio T5 cards and it compiles for 32-bit targets
as well.
diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c
b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c
index 426953a..6127f5f 100644
--- a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c
+++ b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c
@@ -728,7 +728,7 @@ pci_vfio_map_resource(struct rte_pci_device *dev)
struct vfio_region_info reg = { .argsz = sizeof(reg) };
void *bar_addr;
struct memreg {
- uint32_t offset, size;
+ unsigned long offset, size;
} memreg[2] = {};
reg.index = i;
@@ -771,7 +771,7 @@ pci_vfio_map_resource(struct rte_pci_device *dev)
RTE_LOG(DEBUG, EAL,
"Trying to map BAR %d that contains the
MSI-X "
"table. Trying offsets: "
- "%04x:%04x, %04x:%04x\n", i,
+ "0x%04lx:0x%04lx, 0x%04lx:0x%04lx\n", i,
memreg[0].offset, memreg[0].size,
memreg[1].offset, memreg[1].size);
}
Thanks,
Rahul
