> Add two new power management intrinsics, and provide an implementation > in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions > are implemented as raw byte opcodes because there is not yet widespread > compiler support for these instructions. > > The power management instructions provide an architecture-specific > function to either wait until a specified TSC timestamp is reached, or > optionally wait until either a TSC timestamp is reached or a memory > location is written to. The monitor function also provides an optional > comparison, to avoid sleeping when the expected write has already > happened, and no more writes are expected. > > For more details, please refer to Intel(R) 64 and IA-32 Architectures > Software Developer's Manual, Volume 2. > > Signed-off-by: Liang Ma <liang.j...@intel.com> > Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com> > Acked-by: David Christensen <d...@linux.vnet.ibm.com> > --- >
Acked-by: Konstantin Ananyev <konstantin.anan...@intel.com> > 2.17.1
