On Wed, Sep 23, 2020 at 4:23 PM Radu Nicolau <radu.nico...@intel.com> wrote: > > Implement 2 new functions that will enable write combining > stores depending on architecture. The functions are provided > as a generic stub and a x86 specific implementation. > > The reason to implement these functions is to improve performance > by reducing the overhead associated with regular mmio writes when > updating the hardware queue tails and doorbells. > > With this patch set the I40E, ICE, IXGBE and QAT PMDs are updated to > use the write combining store functions with other PMDs to follow. > > > Radu Nicolau (5): > eal: add WC store functions > net/i40e: use WC store to update queue tail registers > common/qat: use WC store to update queue tail registers > net/ixgbe: use WC store to update queue tail registers > net/ice: use WC store to update queue tail registers
Series applied. -- David Marchand