On Thu, Oct 8, 2020 at 2:04 PM Thomas Monjalon <tho...@monjalon.net> wrote: > > > Add two new power management intrinsics, and provide an implementation > > in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions > > are implemented as raw byte opcodes because there is not yet widespread > > compiler support for these instructions. > > > > The power management instructions provide an architecture-specific > > function to either wait until a specified TSC timestamp is reached, or > > optionally wait until either a TSC timestamp is reached or a memory > > location is written to. The monitor function also provides an optional > > comparison, to avoid sleeping when the expected write has already > > happened, and no more writes are expected. > > > > For more details, Please reference Intel SDM Volume 2. > > I really would like to see feedbacks from other arch maintainers. > Unfortunately they were not Cc'ed.
Shared the feedback from the arm64 perspective here. Yet to get a reply on this. http://mails.dpdk.org/archives/dev/2020-September/181646.html > Also please mark the new functions as experimental. > >
