65 bytes frame may degrade performace a lot.Thats related to DMA and cache.
When NIC dma packets to memory, NIC has to do read modify write if DMA size is 
partial cache line.So for 65 bytes, the first 64 bytes are ok. The next 1 byte 
NIC has to read the whole cache line, change one byte and update the cache line.
So in DPDK, CRC is not stripped and ethernet header aligned to cache line which 
causes ip header not aligned on 4 bytes.


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