Only a few definitions from the hardware spec are actually used in the driver runtime, so we can copy over those few and make the rest of the spec a private header in the driver.
Signed-off-by: Bruce Richardson <bruce.richard...@intel.com> --- drivers/raw/ioat/ioat_rawdev.c | 3 ++ .../raw/ioat/{rte_ioat_spec.h => ioat_spec.h} | 26 ----------- drivers/raw/ioat/meson.build | 3 +- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 44 +++++++++++++++++-- 4 files changed, 44 insertions(+), 32 deletions(-) rename drivers/raw/ioat/{rte_ioat_spec.h => ioat_spec.h} (91%) diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 856b55cb6e..bba072f2a7 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -4,10 +4,12 @@ #include <rte_cycles.h> #include <rte_bus_pci.h> +#include <rte_memzone.h> #include <rte_string_fns.h> #include <rte_rawdev_pmd.h> #include "rte_ioat_rawdev.h" +#include "ioat_spec.h" static struct rte_pci_driver ioat_pmd_drv; @@ -261,6 +263,7 @@ ioat_rawdev_create(const char *name, struct rte_pci_device *dev) ioat->rawdev = rawdev; ioat->mz = mz; ioat->regs = dev->mem_resource[0].addr; + ioat->doorbell = &ioat->regs->dmacount; ioat->ring_size = 0; ioat->desc_ring = NULL; ioat->status_addr = ioat->mz->iova + diff --git a/drivers/raw/ioat/rte_ioat_spec.h b/drivers/raw/ioat/ioat_spec.h similarity index 91% rename from drivers/raw/ioat/rte_ioat_spec.h rename to drivers/raw/ioat/ioat_spec.h index c6e7929b2c..9645e16d41 100644 --- a/drivers/raw/ioat/rte_ioat_spec.h +++ b/drivers/raw/ioat/ioat_spec.h @@ -86,32 +86,6 @@ struct rte_ioat_registers { #define RTE_IOAT_CHANCMP_ALIGN 8 /* CHANCMP address must be 64-bit aligned */ -struct rte_ioat_generic_hw_desc { - uint32_t size; - union { - uint32_t control_raw; - struct { - uint32_t int_enable: 1; - uint32_t src_snoop_disable: 1; - uint32_t dest_snoop_disable: 1; - uint32_t completion_update: 1; - uint32_t fence: 1; - uint32_t reserved2: 1; - uint32_t src_page_break: 1; - uint32_t dest_page_break: 1; - uint32_t bundle: 1; - uint32_t dest_dca: 1; - uint32_t hint: 1; - uint32_t reserved: 13; - uint32_t op: 8; - } control; - } u; - uint64_t src_addr; - uint64_t dest_addr; - uint64_t next; - uint64_t op_specific[4]; -}; - struct rte_ioat_dma_hw_desc { uint32_t size; union { diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index f66e9b605e..06636f8a9f 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -8,5 +8,4 @@ sources = files('ioat_rawdev.c', deps += ['rawdev', 'bus_pci', 'mbuf'] install_headers('rte_ioat_rawdev.h', - 'rte_ioat_rawdev_fns.h', - 'rte_ioat_spec.h') + 'rte_ioat_rawdev_fns.h') diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 06b4edcbb0..0cee6b1b09 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -5,9 +5,37 @@ #define _RTE_IOAT_RAWDEV_FNS_H_ #include <x86intrin.h> -#include <rte_memzone.h> #include <rte_prefetch.h> -#include "rte_ioat_spec.h" + +/** + * @internal + * Structure representing a device descriptor + */ +struct rte_ioat_generic_hw_desc { + uint32_t size; + union { + uint32_t control_raw; + struct { + uint32_t int_enable: 1; + uint32_t src_snoop_disable: 1; + uint32_t dest_snoop_disable: 1; + uint32_t completion_update: 1; + uint32_t fence: 1; + uint32_t reserved2: 1; + uint32_t src_page_break: 1; + uint32_t dest_page_break: 1; + uint32_t bundle: 1; + uint32_t dest_dca: 1; + uint32_t hint: 1; + uint32_t reserved: 13; + uint32_t op: 8; + } control; + } u; + uint64_t src_addr; + uint64_t dest_addr; + uint64_t next; + uint64_t op_specific[4]; +}; /** * @internal @@ -18,7 +46,7 @@ struct rte_ioat_rawdev { const struct rte_memzone *mz; const struct rte_memzone *desc_mz; - volatile struct rte_ioat_registers *regs; + volatile uint16_t *doorbell; phys_addr_t status_addr; phys_addr_t ring_addr; @@ -39,8 +67,16 @@ struct rte_ioat_rawdev { /* to report completions, the device will write status back here */ volatile uint64_t status __rte_cache_aligned; + + /* pointer to the register bar */ + volatile struct rte_ioat_registers *regs; }; +#define RTE_IOAT_CHANSTS_IDLE 0x1 +#define RTE_IOAT_CHANSTS_SUSPENDED 0x2 +#define RTE_IOAT_CHANSTS_HALTED 0x3 +#define RTE_IOAT_CHANSTS_ARMED 0x4 + /** * Enqueue a copy operation onto the ioat device */ @@ -90,7 +126,7 @@ rte_ioat_do_copies(int dev_id) ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u .control.completion_update = 1; rte_compiler_barrier(); - ioat->regs->dmacount = ioat->next_write; + *ioat->doorbell = ioat->next_write; ioat->started = ioat->enqueued; } -- 2.25.1