> -----Original Message----- > From: Yigit, Ferruh <ferruh.yi...@intel.com> > Sent: Friday, June 12, 2020 2:38 AM > To: Zhang, Qi Z <qi.z.zh...@intel.com>; Yang, Qiming <qiming.y...@intel.com> > Cc: Ye, Xiaolong <xiaolong...@intel.com>; dev@dpdk.org; Nowlin, Dan > <dan.now...@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell...@intel.com> > Subject: Re: [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after > PFR > > On 6/9/2020 12:59 PM, Qi Zhang wrote: > > To allow for resets during package download, increase the timeout > > period after performing a PFR. The time waited is the global config > > lock timeout plus the normal PFSWR timeout. > > Is PFR == PF Reset, right? And is this same as FLR? Yes, PFR is PF Reset, but its not same as FLR, FLR is PF level reset, which specific for operation system set FLR bit in the PCIe config While FLR will trigger PF reset, but device driver can also setting specific register to reset the PF.
Regards Qi > > > > > Signed-off-by: Dan Nowlin <dan.now...@intel.com> > > Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell...@intel.com> > > Signed-off-by: Qi Zhang <qi.z.zh...@intel.com> > > <...>
