On 6/9/2020 12:59 PM, Qi Zhang wrote: > Mask bits before accessing the profile type field.
RL profile == Rate Limiter profile? > > Signed-off-by: Tarun Singh <tarun.k.si...@intel.com> > Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell...@intel.com> > Signed-off-by: Qi Zhang <qi.z.zh...@intel.com> <...>
